Commit 6cad2983 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Vinod Koul
Browse files

phy: qcom-qmp: rename QMP V2 PCS registers 



Rename QMP V2 PCS registers to follow the usual pattern of
QPHY_V2_PCS_*.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-7-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 079328a9

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

+2 −2
Original line number Diff line number Diff line
@@ -1674,7 +1674,7 @@ static int qcom_qmp_phy_combo_com_init(struct qmp_phy *qphy) 
				cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

				cfg->pwrdn_ctrl);

	else

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);



	mutex_unlock(&qmp->phy_mutex);
@@ -1836,7 +1836,7 @@ static int qcom_qmp_phy_combo_power_off(struct phy *phy) 
			qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

				     cfg->pwrdn_ctrl);

		} else {

			qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,

			qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

					cfg->pwrdn_ctrl);

		}

	}

drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c

+10 −10
Original line number Diff line number Diff line
@@ -222,17 +222,17 @@ static const struct qmp_phy_init_tbl msm8996_pcie_rx_tbl[] = { 
};



static const struct qmp_phy_init_tbl msm8996_pcie_pcs_tbl[] = {

	QMP_PHY_INIT_CFG(QPHY_RX_IDLE_DTCT_CNTRL, 0x4c),

	QMP_PHY_INIT_CFG(QPHY_PWRUP_RESET_DLY_TIME_AUXCLK, 0x00),

	QMP_PHY_INIT_CFG(QPHY_LP_WAKEUP_DLY_TIME_AUXCLK, 0x01),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_IDLE_DTCT_CNTRL, 0x4c),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_PWRUP_RESET_DLY_TIME_AUXCLK, 0x00),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_LP_WAKEUP_DLY_TIME_AUXCLK, 0x01),



	QMP_PHY_INIT_CFG_L(QPHY_PLL_LOCK_CHK_DLY_TIME, 0x05),



	QMP_PHY_INIT_CFG(QPHY_ENDPOINT_REFCLK_DRIVE, 0x05),

	QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x02),

	QMP_PHY_INIT_CFG(QPHY_POWER_STATE_CONFIG4, 0x00),

	QMP_PHY_INIT_CFG(QPHY_POWER_STATE_CONFIG1, 0xa3),

	QMP_PHY_INIT_CFG(QPHY_TXDEEMPH_M3P5DB_V0, 0x0e),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_ENDPOINT_REFCLK_DRIVE, 0x05),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_POWER_DOWN_CONTROL, 0x02),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_POWER_STATE_CONFIG4, 0x00),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_POWER_STATE_CONFIG1, 0xa3),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TXDEEMPH_M3P5DB_V0, 0x0e),

};



struct qmp_phy;
@@ -637,7 +637,7 @@ static int qcom_qmp_phy_pcie_msm8996_power_on(struct phy *phy) 
	 * Pull out PHY from POWER DOWN state.

	 * This is active low enable signal to power-down PHY.

	 */

	qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);

	qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);



	if (cfg->has_pwrdn_delay)

		usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
@@ -687,7 +687,7 @@ static int qcom_qmp_phy_pcie_msm8996_power_off(struct phy *phy) 
		qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	} else {

		qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);

	}

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

+13 −13
Original line number Diff line number Diff line
@@ -438,17 +438,17 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_rx_tbl[] = { 
};



static const struct qmp_phy_init_tbl ipq8074_pcie_pcs_tbl[] = {

	QMP_PHY_INIT_CFG(QPHY_ENDPOINT_REFCLK_DRIVE, 0x4),

	QMP_PHY_INIT_CFG(QPHY_OSC_DTCT_ACTIONS, 0x0),

	QMP_PHY_INIT_CFG(QPHY_PWRUP_RESET_DLY_TIME_AUXCLK, 0x40),

	QMP_PHY_INIT_CFG(QPHY_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB, 0x0),

	QMP_PHY_INIT_CFG(QPHY_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB, 0x40),

	QMP_PHY_INIT_CFG(QPHY_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB, 0x0),

	QMP_PHY_INIT_CFG(QPHY_LP_WAKEUP_DLY_TIME_AUXCLK, 0x40),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_ENDPOINT_REFCLK_DRIVE, 0x4),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_OSC_DTCT_ACTIONS, 0x0),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_PWRUP_RESET_DLY_TIME_AUXCLK, 0x40),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB, 0x0),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB, 0x40),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB, 0x0),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_LP_WAKEUP_DLY_TIME_AUXCLK, 0x40),

	QMP_PHY_INIT_CFG_L(QPHY_PLL_LOCK_CHK_DLY_TIME, 0x73),

	QMP_PHY_INIT_CFG(QPHY_RX_SIGDET_LVL, 0x99),

	QMP_PHY_INIT_CFG(QPHY_TXDEEMPH_M6DB_V0, 0x15),

	QMP_PHY_INIT_CFG(QPHY_TXDEEMPH_M3P5DB_V0, 0xe),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_SIGDET_LVL, 0x99),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TXDEEMPH_M6DB_V0, 0x15),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TXDEEMPH_M3P5DB_V0, 0xe),

	QMP_PHY_INIT_CFG_L(QPHY_SW_RESET, 0x0),

	QMP_PHY_INIT_CFG_L(QPHY_START_CTRL, 0x3),

};
@@ -1984,7 +1984,7 @@ static int qcom_qmp_phy_pcie_com_init(struct qmp_phy *qphy) 
				cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

				cfg->pwrdn_ctrl);

	else

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);



	return 0;
@@ -2093,7 +2093,7 @@ static int qcom_qmp_phy_pcie_power_on(struct phy *phy) 
	 * Pull out PHY from POWER DOWN state.

	 * This is active low enable signal to power-down PHY.

	 */

	qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);

	qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);



	if (cfg->has_pwrdn_delay)

		usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
@@ -2141,7 +2141,7 @@ static int qcom_qmp_phy_pcie_power_off(struct phy *phy) 
		qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	} else {

		qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);

	}

drivers/phy/qualcomm/phy-qcom-qmp-ufs.c

+11 −11
Original line number Diff line number Diff line
@@ -310,15 +310,15 @@ static const struct qmp_phy_init_tbl sm6115_ufsphy_rx_tbl[] = { 
};



static const struct qmp_phy_init_tbl sm6115_ufsphy_pcs_tbl[] = {

	QMP_PHY_INIT_CFG(QPHY_RX_PWM_GEAR_BAND, 0x15),

	QMP_PHY_INIT_CFG(QPHY_RX_SIGDET_CTRL2, 0x6d),

	QMP_PHY_INIT_CFG(QPHY_TX_LARGE_AMP_DRV_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_TX_SMALL_AMP_DRV_LVL, 0x02),

	QMP_PHY_INIT_CFG(QPHY_RX_MIN_STALL_NOCONFIG_TIME_CAP, 0x28),

	QMP_PHY_INIT_CFG(QPHY_RX_SYM_RESYNC_CTRL, 0x03),

	QMP_PHY_INIT_CFG(QPHY_TX_LARGE_AMP_POST_EMP_LVL, 0x12),

	QMP_PHY_INIT_CFG(QPHY_TX_SMALL_AMP_POST_EMP_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_RX_MIN_HIBERN8_TIME, 0x9a), /* 8 us */

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_PWM_GEAR_BAND, 0x15),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_SIGDET_CTRL2, 0x6d),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_LARGE_AMP_DRV_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_SMALL_AMP_DRV_LVL, 0x02),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_MIN_STALL_NOCONFIG_TIME_CAP, 0x28),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_SYM_RESYNC_CTRL, 0x03),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_LARGE_AMP_POST_EMP_LVL, 0x12),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_SMALL_AMP_POST_EMP_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_MIN_HIBERN8_TIME, 0x9a), /* 8 us */

};



static const struct qmp_phy_init_tbl sdm845_ufsphy_serdes_tbl[] = {
@@ -941,7 +941,7 @@ static int qcom_qmp_phy_ufs_com_init(struct qmp_phy *qphy) 
			     cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	else

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

			     cfg->pwrdn_ctrl);



	return 0;
@@ -1083,7 +1083,7 @@ static int qcom_qmp_phy_ufs_power_off(struct phy *phy) 
		qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	} else {

		qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);

	}

drivers/phy/qualcomm/phy-qcom-qmp-usb.c

+6 −6
Original line number Diff line number Diff line
@@ -325,10 +325,10 @@ static const struct qmp_phy_init_tbl msm8996_usb3_pcs_tbl[] = { 
	QMP_PHY_INIT_CFG_L(QPHY_FLL_MAN_CODE, 0x85),



	/* Lock Det settings */

	QMP_PHY_INIT_CFG(QPHY_LOCK_DETECT_CONFIG1, 0xd1),

	QMP_PHY_INIT_CFG(QPHY_LOCK_DETECT_CONFIG2, 0x1f),

	QMP_PHY_INIT_CFG(QPHY_LOCK_DETECT_CONFIG3, 0x47),

	QMP_PHY_INIT_CFG(QPHY_POWER_STATE_CONFIG2, 0x08),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_LOCK_DETECT_CONFIG1, 0xd1),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_LOCK_DETECT_CONFIG2, 0x1f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_LOCK_DETECT_CONFIG3, 0x47),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_POWER_STATE_CONFIG2, 0x08),

};



static const struct qmp_phy_init_tbl qmp_v3_usb3_serdes_tbl[] = {
@@ -2095,7 +2095,7 @@ static int qcom_qmp_phy_usb_com_init(struct qmp_phy *qphy) 
			     cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	else

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

			     cfg->pwrdn_ctrl);



	return 0;
@@ -2223,7 +2223,7 @@ static int qcom_qmp_phy_usb_power_off(struct phy *phy) 
		qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	} else {

		qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,

		qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);

	}