Commit 6cc05ba2 authored by Thierry Reding's avatar Thierry Reding
Browse files

ARM: tegra: Add missing host1x properties 



The host1x device tree bindings require the clock- and interrupt-names
properties to be present, so add them where missing.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent f0fd20a5

arch/arm/boot/dts/tegra114.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -22,7 +22,9 @@ host1x@50000000 { 
		reg = <0x50000000 0x00028000>;

		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */

			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */

		interrupt-names = "syncpt", "host1x";

		clocks = <&tegra_car TEGRA114_CLK_HOST1X>;

		clock-names = "host1x";

		resets = <&tegra_car 28>;

		reset-names = "host1x";

		iommus = <&mc TEGRA_SWGROUP_HC>;

arch/arm/boot/dts/tegra124.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -89,7 +89,9 @@ host1x@50000000 { 
		reg = <0x0 0x50000000 0x0 0x00034000>;

		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */

			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */

		interrupt-names = "syncpt", "host1x";

		clocks = <&tegra_car TEGRA124_CLK_HOST1X>;

		clock-names = "host1x";

		resets = <&tegra_car 28>;

		reset-names = "host1x";

		iommus = <&mc TEGRA_SWGROUP_HC>;

arch/arm/boot/dts/tegra20.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -35,7 +35,9 @@ host1x@50000000 { 
		reg = <0x50000000 0x00024000>;

		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */

			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */

		interrupt-names = "syncpt", "host1x";

		clocks = <&tegra_car TEGRA20_CLK_HOST1X>;

		clock-names = "host1x";

		resets = <&tegra_car 28>;

		reset-names = "host1x";

arch/arm/boot/dts/tegra30.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -115,7 +115,9 @@ host1x@50000000 { 
		reg = <0x50000000 0x00024000>;

		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */

			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */

		interrupt-names = "syncpt", "host1x";

		clocks = <&tegra_car TEGRA30_CLK_HOST1X>;

		clock-names = "host1x";

		resets = <&tegra_car 28>;

		reset-names = "host1x";

		iommus = <&mc TEGRA_SWGROUP_HC>;