Commit 6e752d4a authored by Thierry Reding's avatar Thierry Reding
Browse files

arm64: tegra: Remove {clock,reset}-names from VIC powergate 



According to the device tree bindings, the powergate definition nodes
don't contain clock-names and reset-names properties, so remove them.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent ee561fc4

arch/arm64/boot/dts/nvidia/tegra210.dtsi

+0 −2
Original line number Diff line number Diff line
@@ -916,9 +916,7 @@ pd_venc: venc { 


			pd_vic: vic {

				clocks = <&tegra_car TEGRA210_CLK_VIC03>;

				clock-names = "vic";

				resets = <&tegra_car 178>;

				reset-names = "vic";

				#power-domain-cells = <0>;

			};