Commit 6f048cc7 authored by Xianwei Zhao's avatar Xianwei Zhao Committed by Neil Armstrong
Browse files

arm64: dts: add board AN400



Add devicetrees support for Amlogic AN400  board based T7 SoC.

Signed-off-by: default avatarXianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20230706091954.3301224-3-xianwei.zhao@amlogic.com


Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent 015623ec
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
 */

/dts-v1/;

#include "amlogic-t7.dtsi"

/ {
	model = "Amlogic A311D2 AN400 Development Board";
	compatible = "amlogic,an400", "amlogic,a311d2", "amlogic,t7";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		serial0 = &uart_a;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000 0xE0000000
			0x00000001 0x00000000 0x00000000 0x20000000>;
	};

	xtal: xtal-clk {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "xtal";
		#clock-cells = <0>;
	};
};

&uart_a {
	clocks = <&xtal>, <&xtal>, <&xtal>;
	clock-names = "xtal", "pclk", "baud";
	status = "okay";
};