Commit 71587801 authored by Marek Behún's avatar Marek Behún Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function 



We found out that we are unable to control the PERST# signal via the
default pin dedicated to be PERST# pin (GPIO2[3] pin) on A3700 SOC when
this pin is in EP_PCIE1_Resetn mode. There is a register in the PCIe
register space called PERSTN_GPIO_EN (D0088004[3]), but changing the
value of this register does not change the pin output when measuring
with voltmeter.

We do not know if this is a bug in the SOC, or if it works only when
PCIe controller is in a certain state.

Commit f4c7d053 ("PCI: aardvark: Wait for endpoint to be ready
before training link") says that when this pin changes pinctrl mode
from EP_PCIE1_Resetn to GPIO, the PERST# signal is asserted for a brief
moment.

So currently the situation is that on A3700 boards the PERST# signal is
asserted in U-Boot (because the code in U-Boot issues reset via this pin
via GPIO mode), and then in Linux by the obscure and undocumented
mechanism described by the above mentioned commit.

We want to issue PERST# signal in a known way, therefore this patch
changes the pcie_reset_pin function from "pcie" to "gpio" and adds the
reset-gpios property to the PCIe node in device tree files of
EspressoBin and Armada 3720 Dev Board (Turris Mox device tree already
has this property and uDPU does not have a PCIe port).

Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
Cc: Remi Pommarel <repk@triplefau.lt>
Tested-by: default avatarTomasz Maciej Nowak <tmn505@gmail.com>
Acked-by: default avatarThomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 847c3323

arch/arm64/boot/dts/marvell/armada-3720-db.dts

+3 −0
Original line number Diff line number Diff line
@@ -128,6 +128,9 @@ phy1: ethernet-phy@1 { 


/* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */

&pcie0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;

	reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;

	status = "okay";

};

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ &pcie0 { 
	phys = <&comphy1 0>;

	pinctrl-names = "default";

	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;

	reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;

};



/* J6 */

arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts

+0 −4
Original line number Diff line number Diff line
@@ -128,10 +128,6 @@ rtc@6f { 
	};

};



&pcie_reset_pins {

	function = "gpio";

};



&pcie0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;

arch/arm64/boot/dts/marvell/armada-37xx.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -317,7 +317,7 @@ sdio_pins: sdio-pins { 


				pcie_reset_pins: pcie-reset-pins {

					groups = "pcie1";

					function = "pcie";

					function = "gpio";

				};



				pcie_clkreq_pins: pcie-clkreq-pins {