Commit 7271f14d authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Shawn Guo
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arm64: dts: imx8mm: split PCIe ranges



Two entries are expected for PCIe ranges.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent ca788bb1
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+2 −2
Original line number Diff line number Diff line
@@ -1345,8 +1345,8 @@ pcie0: pcie@33800000 {
			#size-cells = <2>;
			device_type = "pci";
			bus-range = <0x00 0xff>;
			ranges =  <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
				   0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
			ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
				 <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
			num-lanes = <1>;
			num-viewport = <4>;
			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;