Loading drivers/gpu/drm/nouveau/include/nvif/class.h +2 −77 Original line number Diff line number Diff line Loading @@ -3,8 +3,8 @@ /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_CLASS_CONTROL /* if0001.h */ -1 #define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_PERFMON /* if0002.h */ -2 #define NVIF_CLASS_PERFDOM /* if0003.h */ -3 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -4 #define NVIF_CLASS_SW_NV10 /* if0005.h */ -5 #define NVIF_CLASS_SW_NV50 /* if0005.h */ -6 Loading Loading @@ -266,79 +266,4 @@ struct gf119_dma_v0 { __u8 kind; __u8 pad03[5]; }; /******************************************************************************* * perfmon ******************************************************************************/ #define NVIF_PERFMON_V0_QUERY_DOMAIN 0x00 #define NVIF_PERFMON_V0_QUERY_SIGNAL 0x01 #define NVIF_PERFMON_V0_QUERY_SOURCE 0x02 struct nvif_perfmon_query_domain_v0 { __u8 version; __u8 id; __u8 counter_nr; __u8 iter; __u16 signal_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_signal_v0 { __u8 version; __u8 domain; __u16 iter; __u8 signal; __u8 source_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_source_v0 { __u8 version; __u8 domain; __u8 signal; __u8 iter; __u8 pad04[4]; __u32 source; __u32 mask; char name[64]; }; /******************************************************************************* * perfdom ******************************************************************************/ struct nvif_perfdom_v0 { __u8 version; __u8 domain; __u8 mode; __u8 pad03[1]; struct { __u8 signal[4]; __u64 source[4][8]; __u16 logic_op; } ctr[4]; }; #define NVIF_PERFDOM_V0_INIT 0x00 #define NVIF_PERFDOM_V0_SAMPLE 0x01 #define NVIF_PERFDOM_V0_READ 0x02 struct nvif_perfdom_init { }; struct nvif_perfdom_sample { }; struct nvif_perfdom_read_v0 { __u8 version; __u8 pad01[7]; __u32 ctr[4]; __u32 clk; __u8 pad04[4]; }; #endif drivers/gpu/drm/nouveau/include/nvif/if0002.h 0 → 100644 +38 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0002_H__ #define __NVIF_IF0002_H__ #define NVIF_PERFMON_V0_QUERY_DOMAIN 0x00 #define NVIF_PERFMON_V0_QUERY_SIGNAL 0x01 #define NVIF_PERFMON_V0_QUERY_SOURCE 0x02 struct nvif_perfmon_query_domain_v0 { __u8 version; __u8 id; __u8 counter_nr; __u8 iter; __u16 signal_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_signal_v0 { __u8 version; __u8 domain; __u16 iter; __u8 signal; __u8 source_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_source_v0 { __u8 version; __u8 domain; __u8 signal; __u8 iter; __u8 pad04[4]; __u32 source; __u32 mask; char name[64]; }; #endif drivers/gpu/drm/nouveau/include/nvif/if0003.h 0 → 100644 +33 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0003_H__ #define __NVIF_IF0003_H__ struct nvif_perfdom_v0 { __u8 version; __u8 domain; __u8 mode; __u8 pad03[1]; struct { __u8 signal[4]; __u64 source[4][8]; __u16 logic_op; } ctr[4]; }; #define NVIF_PERFDOM_V0_INIT 0x00 #define NVIF_PERFDOM_V0_SAMPLE 0x01 #define NVIF_PERFDOM_V0_READ 0x02 struct nvif_perfdom_init { }; struct nvif_perfdom_sample { }; struct nvif_perfdom_read_v0 { __u8 version; __u8 pad01[7]; __u32 ctr[4]; __u32 clk; __u8 pad04[4]; }; #endif drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c +2 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,8 @@ #include <core/option.h> #include <nvif/class.h> #include <nvif/if0002.h> #include <nvif/if0003.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> Loading Loading
drivers/gpu/drm/nouveau/include/nvif/class.h +2 −77 Original line number Diff line number Diff line Loading @@ -3,8 +3,8 @@ /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_CLASS_CONTROL /* if0001.h */ -1 #define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_PERFMON /* if0002.h */ -2 #define NVIF_CLASS_PERFDOM /* if0003.h */ -3 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -4 #define NVIF_CLASS_SW_NV10 /* if0005.h */ -5 #define NVIF_CLASS_SW_NV50 /* if0005.h */ -6 Loading Loading @@ -266,79 +266,4 @@ struct gf119_dma_v0 { __u8 kind; __u8 pad03[5]; }; /******************************************************************************* * perfmon ******************************************************************************/ #define NVIF_PERFMON_V0_QUERY_DOMAIN 0x00 #define NVIF_PERFMON_V0_QUERY_SIGNAL 0x01 #define NVIF_PERFMON_V0_QUERY_SOURCE 0x02 struct nvif_perfmon_query_domain_v0 { __u8 version; __u8 id; __u8 counter_nr; __u8 iter; __u16 signal_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_signal_v0 { __u8 version; __u8 domain; __u16 iter; __u8 signal; __u8 source_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_source_v0 { __u8 version; __u8 domain; __u8 signal; __u8 iter; __u8 pad04[4]; __u32 source; __u32 mask; char name[64]; }; /******************************************************************************* * perfdom ******************************************************************************/ struct nvif_perfdom_v0 { __u8 version; __u8 domain; __u8 mode; __u8 pad03[1]; struct { __u8 signal[4]; __u64 source[4][8]; __u16 logic_op; } ctr[4]; }; #define NVIF_PERFDOM_V0_INIT 0x00 #define NVIF_PERFDOM_V0_SAMPLE 0x01 #define NVIF_PERFDOM_V0_READ 0x02 struct nvif_perfdom_init { }; struct nvif_perfdom_sample { }; struct nvif_perfdom_read_v0 { __u8 version; __u8 pad01[7]; __u32 ctr[4]; __u32 clk; __u8 pad04[4]; }; #endif
drivers/gpu/drm/nouveau/include/nvif/if0002.h 0 → 100644 +38 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0002_H__ #define __NVIF_IF0002_H__ #define NVIF_PERFMON_V0_QUERY_DOMAIN 0x00 #define NVIF_PERFMON_V0_QUERY_SIGNAL 0x01 #define NVIF_PERFMON_V0_QUERY_SOURCE 0x02 struct nvif_perfmon_query_domain_v0 { __u8 version; __u8 id; __u8 counter_nr; __u8 iter; __u16 signal_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_signal_v0 { __u8 version; __u8 domain; __u16 iter; __u8 signal; __u8 source_nr; __u8 pad05[2]; char name[64]; }; struct nvif_perfmon_query_source_v0 { __u8 version; __u8 domain; __u8 signal; __u8 iter; __u8 pad04[4]; __u32 source; __u32 mask; char name[64]; }; #endif
drivers/gpu/drm/nouveau/include/nvif/if0003.h 0 → 100644 +33 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0003_H__ #define __NVIF_IF0003_H__ struct nvif_perfdom_v0 { __u8 version; __u8 domain; __u8 mode; __u8 pad03[1]; struct { __u8 signal[4]; __u64 source[4][8]; __u16 logic_op; } ctr[4]; }; #define NVIF_PERFDOM_V0_INIT 0x00 #define NVIF_PERFDOM_V0_SAMPLE 0x01 #define NVIF_PERFDOM_V0_READ 0x02 struct nvif_perfdom_init { }; struct nvif_perfdom_sample { }; struct nvif_perfdom_read_v0 { __u8 version; __u8 pad01[7]; __u32 ctr[4]; __u32 clk; __u8 pad04[4]; }; #endif
drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c +2 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,8 @@ #include <core/option.h> #include <nvif/class.h> #include <nvif/if0002.h> #include <nvif/if0003.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> Loading