Commit 78155527 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'zynq-dt-for-v5.12-v2' of https://github.com/Xilinx/linux-xlnx into arm/dt 

ARM: dts: Zynq DT changes for v5.12-v2

- Add Ebang board support
- Add missing zturn boards in dt binding
- And convert Zynq QSPI binding

* tag 'zynq-dt-for-v5.12-v2' of https://github.com/Xilinx/linux-xlnx:
  dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml
  dt-bindings: arm: xilinx: Add missing Zturn boards
  ARM: dts: ebaz4205: add pinctrl entries for switches
  ARM: dts: add Ebang EBAZ4205 device tree
  dt-bindings: arm: add Ebang EBAZ4205 board
  dt-bindings: add ebang vendor prefix

Link: https://lore.kernel.org/r/19e0e0c9-1bed-bba5-6c80-6903937b3d96@xilinx.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents a36c9ff6 19e1f484

Documentation/devicetree/bindings/arm/xilinx.yaml

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@@ -22,6 +22,9 @@ properties: 
              - adapteva,parallella

              - digilent,zynq-zybo

              - digilent,zynq-zybo-z7

              - ebang,ebaz4205

              - myir,zynq-zturn-v5

              - myir,zynq-zturn

              - xlnx,zynq-cc108

              - xlnx,zynq-zc702

              - xlnx,zynq-zc706

Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt

deleted100644 → 0
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Xilinx Zynq QSPI controller Device Tree Bindings

-------------------------------------------------------------------



Required properties:

- compatible		: Should be "xlnx,zynq-qspi-1.0".

- reg			: Physical base address and size of QSPI registers map.

- interrupts		: Property with a value describing the interrupt

			  number.

- clock-names		: List of input clock names - "ref_clk", "pclk"

			  (See clock bindings for details).

- clocks		: Clock phandles (see clock bindings for details).



Optional properties:

- num-cs		: Number of chip selects used.



Example:

	qspi: spi@e000d000 {

		compatible = "xlnx,zynq-qspi-1.0";

		reg = <0xe000d000 0x1000>;

		interrupt-parent = <&intc>;

		interrupts = <0 19 4>;

		clock-names = "ref_clk", "pclk";

		clocks = <&clkc 10>, <&clkc 43>;

		num-cs = <1>;

	};

Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Xilinx Zynq QSPI controller



description:

  The Xilinx Zynq QSPI controller is used to access multi-bit serial flash

  memory devices.



allOf:

  - $ref: "spi-controller.yaml#"



maintainers:

  - Michal Simek <michal.simek@xilinx.com>



# Everything else is described in the common file

properties:

  compatible:

    const: xlnx,zynq-qspi-1.0



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: reference clock

      - description: peripheral clock



  clock-names:

    items:

      - const: ref_clk

      - const: pclk



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    spi@e000d000 {

        compatible = "xlnx,zynq-qspi-1.0";

        reg = <0xe000d000 0x1000>;

        interrupt-parent = <&intc>;

        interrupts = <0 19 4>;

        clock-names = "ref_clk", "pclk";

        clocks = <&clkc 10>, <&clkc 43>;

        num-cs = <1>;

    };

Documentation/devicetree/bindings/vendor-prefixes.yaml

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@@ -313,6 +313,8 @@ patternProperties: 
    description: Dyna-Image

  "^ea,.*":

    description: Embedded Artists AB

  "^ebang,.*":

    description: Zhejiang Ebang Communication Co., Ltd

  "^ebs-systart,.*":

    description: EBS-SYSTART GmbH

  "^ebv,.*":

MAINTAINERS

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@@ -2768,6 +2768,7 @@ W: http://wiki.xilinx.com 
T:	git https://github.com/Xilinx/linux-xlnx.git

F:	Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml

F:	Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml

F:	Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml

F:	arch/arm/mach-zynq/

F:	drivers/block/xsysace.c

F:	drivers/clocksource/timer-cadence-ttc.c