Commit 7adc40c5 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/sec2: select implementation based on available firmware 



This will allow for further customisation of the subdev depending on what
firmware is available.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e14e5e6c

drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h

+2 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: MIT */

#ifndef __NVKM_SEC2_H__

#define __NVKM_SEC2_H__

#define nvkm_sec2(p) container_of((p), struct nvkm_sec2, engine)

#include <core/engine.h>



struct nvkm_sec2 {

	const struct nvkm_sec2_func *func;

	struct nvkm_engine engine;

	u32 addr;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

+25 −13
Original line number Diff line number Diff line
@@ -21,19 +21,11 @@ 
 */

#include "priv.h"



#include <core/firmware.h>

#include <core/msgqueue.h>

#include <subdev/top.h>

#include <engine/falcon.h>



static void *

nvkm_sec2_dtor(struct nvkm_engine *engine)

{

	struct nvkm_sec2 *sec2 = nvkm_sec2(engine);

	nvkm_msgqueue_del(&sec2->queue);

	nvkm_falcon_del(&sec2->falcon);

	return sec2;

}



static void

nvkm_sec2_intr(struct nvkm_engine *engine)

{
@@ -94,6 +86,15 @@ nvkm_sec2_fini(struct nvkm_engine *engine, bool suspend) 
	return 0;

}



static void *

nvkm_sec2_dtor(struct nvkm_engine *engine)

{

	struct nvkm_sec2 *sec2 = nvkm_sec2(engine);

	nvkm_msgqueue_del(&sec2->queue);

	nvkm_falcon_del(&sec2->falcon);

	return sec2;

}



static const struct nvkm_engine_func

nvkm_sec2 = {

	.dtor = nvkm_sec2_dtor,
@@ -103,15 +104,26 @@ nvkm_sec2 = { 
};



int

nvkm_sec2_new_(struct nvkm_device *device, int index, u32 addr,

	       struct nvkm_sec2 **psec2)

nvkm_sec2_new_(const struct nvkm_sec2_fwif *fwif, struct nvkm_device *device,

	       int index, u32 addr, struct nvkm_sec2 **psec2)

{

	struct nvkm_sec2 *sec2;

	int ret;



	if (!(sec2 = *psec2 = kzalloc(sizeof(*sec2), GFP_KERNEL)))

		return -ENOMEM;

	sec2->addr = addr;

	INIT_WORK(&sec2->work, nvkm_sec2_recv);



	return nvkm_engine_ctor(&nvkm_sec2, device, index, true, &sec2->engine);

	ret = nvkm_engine_ctor(&nvkm_sec2, device, index, true, &sec2->engine);

	if (ret)

		return ret;



	fwif = nvkm_firmware_load(&sec2->engine.subdev, fwif, "Sec2", sec2);

	if (IS_ERR(fwif))

		return PTR_ERR(fwif);



	sec2->func = fwif->func;



	INIT_WORK(&sec2->work, nvkm_sec2_recv);

	return 0;

};

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

+58 −4
Original line number Diff line number Diff line
@@ -19,12 +19,66 @@ 
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 */



#include "priv.h"

#include <subdev/acr.h>



static const struct nvkm_acr_lsf_func

gp102_sec2_acr_0 = {

};



const struct nvkm_sec2_func

gp102_sec2 = {

};



MODULE_FIRMWARE("nvidia/gp102/sec2/desc.bin");

MODULE_FIRMWARE("nvidia/gp102/sec2/image.bin");

MODULE_FIRMWARE("nvidia/gp102/sec2/sig.bin");

MODULE_FIRMWARE("nvidia/gp104/sec2/desc.bin");

MODULE_FIRMWARE("nvidia/gp104/sec2/image.bin");

MODULE_FIRMWARE("nvidia/gp104/sec2/sig.bin");

MODULE_FIRMWARE("nvidia/gp106/sec2/desc.bin");

MODULE_FIRMWARE("nvidia/gp106/sec2/image.bin");

MODULE_FIRMWARE("nvidia/gp106/sec2/sig.bin");

MODULE_FIRMWARE("nvidia/gp107/sec2/desc.bin");

MODULE_FIRMWARE("nvidia/gp107/sec2/image.bin");

MODULE_FIRMWARE("nvidia/gp107/sec2/sig.bin");



const struct nvkm_acr_lsf_func

gp102_sec2_acr_1 = {

};



int

gp102_sec2_load(struct nvkm_sec2 *sec2, int ver,

		const struct nvkm_sec2_fwif *fwif)

{

	return nvkm_acr_lsfw_load_sig_image_desc_v1(&sec2->engine.subdev,

						    sec2->falcon,

						    NVKM_ACR_LSF_SEC2, "sec2/",

						    ver, fwif->acr);

}



MODULE_FIRMWARE("nvidia/gp102/sec2/desc-1.bin");

MODULE_FIRMWARE("nvidia/gp102/sec2/image-1.bin");

MODULE_FIRMWARE("nvidia/gp102/sec2/sig-1.bin");

MODULE_FIRMWARE("nvidia/gp104/sec2/desc-1.bin");

MODULE_FIRMWARE("nvidia/gp104/sec2/image-1.bin");

MODULE_FIRMWARE("nvidia/gp104/sec2/sig-1.bin");

MODULE_FIRMWARE("nvidia/gp106/sec2/desc-1.bin");

MODULE_FIRMWARE("nvidia/gp106/sec2/image-1.bin");

MODULE_FIRMWARE("nvidia/gp106/sec2/sig-1.bin");

MODULE_FIRMWARE("nvidia/gp107/sec2/desc-1.bin");

MODULE_FIRMWARE("nvidia/gp107/sec2/image-1.bin");

MODULE_FIRMWARE("nvidia/gp107/sec2/sig-1.bin");



static const struct nvkm_sec2_fwif

gp102_sec2_fwif[] = {

	{ 1, gp102_sec2_load, &gp102_sec2, &gp102_sec2_acr_1 },

	{ 0, gp102_sec2_load, &gp102_sec2, &gp102_sec2_acr_0 },

	{}

};



int

gp102_sec2_new(struct nvkm_device *device, int index,

	       struct nvkm_sec2 **psec2)

gp102_sec2_new(struct nvkm_device *device, int index, struct nvkm_sec2 **psec2)

{

	return nvkm_sec2_new_(device, index, 0, psec2);

	return nvkm_sec2_new_(gp102_sec2_fwif, device, index, 0, psec2);

}

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c

+12 −1
Original line number Diff line number Diff line
@@ -20,9 +20,20 @@ 
 * OTHER DEALINGS IN THE SOFTWARE.

 */

#include "priv.h"

#include <subdev/acr.h>



MODULE_FIRMWARE("nvidia/gp108/sec2/desc.bin");

MODULE_FIRMWARE("nvidia/gp108/sec2/image.bin");

MODULE_FIRMWARE("nvidia/gp108/sec2/sig.bin");



static const struct nvkm_sec2_fwif

gp108_sec2_fwif[] = {

	{ 0, gp102_sec2_load, &gp102_sec2, &gp102_sec2_acr_1 },

	{}

};



int

gp108_sec2_new(struct nvkm_device *device, int index, struct nvkm_sec2 **psec2)

{

	return nvkm_sec2_new_(device, index, 0, psec2);

	return nvkm_sec2_new_(gp108_sec2_fwif, device, index, 0, psec2);

}

drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h

+15 −2
Original line number Diff line number Diff line
@@ -3,7 +3,20 @@ 
#define __NVKM_SEC2_PRIV_H__

#include <engine/sec2.h>



#define nvkm_sec2(p) container_of((p), struct nvkm_sec2, engine)

struct nvkm_sec2_func {

};



int nvkm_sec2_new_(struct nvkm_device *, int, u32 addr, struct nvkm_sec2 **);

struct nvkm_sec2_fwif {

	int version;

	int (*load)(struct nvkm_sec2 *, int ver, const struct nvkm_sec2_fwif *);

	const struct nvkm_sec2_func *func;

	const struct nvkm_acr_lsf_func *acr;

};



int gp102_sec2_load(struct nvkm_sec2 *, int, const struct nvkm_sec2_fwif *);

extern const struct nvkm_sec2_func gp102_sec2;

extern const struct nvkm_acr_lsf_func gp102_sec2_acr_1;



int nvkm_sec2_new_(const struct nvkm_sec2_fwif *, struct nvkm_device *,

		   int, u32 addr, struct nvkm_sec2 **);

#endif