Commit 7f51a961 authored by Sindhu-Devale's avatar Sindhu-Devale Committed by Leon Romanovsky
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RDMA/irdma: Align AE id codes to correct flush code and event



A number of asynchronous event (AE) ids were not aligned to the
correct flush_code and event_type. Fix these up so that the
correct IBV error and event codes are returned to application.

Also, add handling for new AE ids like IRDMA_AE_INVALID_REQUEST to
return the correct WC error code.

Fixes: 44d9e529 ("RDMA/irdma: Implement device initialization definitions")
Signed-off-by: default avatarSindhu-Devale <sindhu.devale@intel.com>
Signed-off-by: default avatarShiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20220907191324.1173-2-shiraz.saleem@intel.com


Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent e866025b
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+1 −0
Original line number Diff line number Diff line
@@ -314,6 +314,7 @@ enum irdma_cqp_op_type {
#define IRDMA_AE_IB_REMOTE_ACCESS_ERROR					0x020d
#define IRDMA_AE_IB_REMOTE_OP_ERROR					0x020e
#define IRDMA_AE_WQE_LSMM_TOO_LONG					0x0220
#define IRDMA_AE_INVALID_REQUEST					0x0223
#define IRDMA_AE_DDP_INVALID_MSN_GAP_IN_MSN				0x0301
#define IRDMA_AE_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER	0x0303
#define IRDMA_AE_DDP_UBE_INVALID_DDP_VERSION				0x0304
+30 −21
Original line number Diff line number Diff line
@@ -138,59 +138,68 @@ static void irdma_set_flush_fields(struct irdma_sc_qp *qp,
	qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;

	switch (info->ae_id) {
	case IRDMA_AE_AMP_UNALLOCATED_STAG:
	case IRDMA_AE_AMP_BOUNDS_VIOLATION:
	case IRDMA_AE_AMP_INVALID_STAG:
		qp->event_type = IRDMA_QP_EVENT_ACCESS_ERR;
		fallthrough;
	case IRDMA_AE_AMP_RIGHTS_VIOLATION:
	case IRDMA_AE_AMP_UNALLOCATED_STAG:
	case IRDMA_AE_AMP_BAD_PD:
	case IRDMA_AE_UDA_XMIT_BAD_PD:
	case IRDMA_AE_AMP_BAD_QP:
	case IRDMA_AE_AMP_BAD_STAG_KEY:
	case IRDMA_AE_AMP_BAD_STAG_INDEX:
	case IRDMA_AE_AMP_TO_WRAP:
	case IRDMA_AE_PRIV_OPERATION_DENIED:
		qp->flush_code = FLUSH_PROT_ERR;
		qp->event_type = IRDMA_QP_EVENT_ACCESS_ERR;
		break;
	case IRDMA_AE_AMP_BAD_QP:
	case IRDMA_AE_UDA_XMIT_BAD_PD:
	case IRDMA_AE_WQE_UNEXPECTED_OPCODE:
		qp->flush_code = FLUSH_LOC_QP_OP_ERR;
		qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;
		break;
	case IRDMA_AE_UDA_XMIT_DGRAM_TOO_LONG:
	case IRDMA_AE_UDA_XMIT_DGRAM_TOO_SHORT:
	case IRDMA_AE_UDA_L4LEN_INVALID:
	case IRDMA_AE_DDP_UBE_INVALID_MO:
	case IRDMA_AE_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER:
		qp->flush_code = FLUSH_LOC_LEN_ERR;
		qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;
		break;
	case IRDMA_AE_AMP_BAD_STAG_KEY:
	case IRDMA_AE_AMP_BAD_STAG_INDEX:
	case IRDMA_AE_AMP_TO_WRAP:
	case IRDMA_AE_AMP_RIGHTS_VIOLATION:
	case IRDMA_AE_AMP_INVALIDATE_NO_REMOTE_ACCESS_RIGHTS:
	case IRDMA_AE_PRIV_OPERATION_DENIED:
	case IRDMA_AE_IB_INVALID_REQUEST:
	case IRDMA_AE_IB_REMOTE_ACCESS_ERROR:
		qp->flush_code = FLUSH_REM_ACCESS_ERR;
		qp->event_type = IRDMA_QP_EVENT_ACCESS_ERR;
		break;
	case IRDMA_AE_LLP_SEGMENT_TOO_SMALL:
	case IRDMA_AE_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER:
	case IRDMA_AE_UDA_XMIT_DGRAM_TOO_LONG:
	case IRDMA_AE_UDA_XMIT_DGRAM_TOO_SHORT:
	case IRDMA_AE_UDA_L4LEN_INVALID:
	case IRDMA_AE_LLP_RECEIVED_MPA_CRC_ERROR:
	case IRDMA_AE_ROCE_RSP_LENGTH_ERROR:
		qp->flush_code = FLUSH_LOC_LEN_ERR;
	case IRDMA_AE_IB_REMOTE_OP_ERROR:
		qp->flush_code = FLUSH_REM_OP_ERR;
		qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;
		break;
	case IRDMA_AE_LCE_QP_CATASTROPHIC:
		qp->flush_code = FLUSH_FATAL_ERR;
		qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;
		break;
	case IRDMA_AE_DDP_UBE_INVALID_MO:
	case IRDMA_AE_IB_RREQ_AND_Q1_FULL:
	case IRDMA_AE_LLP_RECEIVED_MPA_CRC_ERROR:
		qp->flush_code = FLUSH_GENERAL_ERR;
		break;
	case IRDMA_AE_LLP_TOO_MANY_RETRIES:
		qp->flush_code = FLUSH_RETRY_EXC_ERR;
		qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;
		break;
	case IRDMA_AE_AMP_MWBIND_INVALID_RIGHTS:
	case IRDMA_AE_AMP_MWBIND_BIND_DISABLED:
	case IRDMA_AE_AMP_MWBIND_INVALID_BOUNDS:
		qp->flush_code = FLUSH_MW_BIND_ERR;
		qp->event_type = IRDMA_QP_EVENT_ACCESS_ERR;
		break;
	case IRDMA_AE_IB_REMOTE_OP_ERROR:
		qp->flush_code = FLUSH_REM_OP_ERR;
	case IRDMA_AE_IB_INVALID_REQUEST:
		qp->flush_code = FLUSH_REM_INV_REQ_ERR;
		qp->event_type = IRDMA_QP_EVENT_REQ_ERR;
		break;
	default:
		qp->flush_code = FLUSH_FATAL_ERR;
		qp->flush_code = FLUSH_GENERAL_ERR;
		qp->event_type = IRDMA_QP_EVENT_CATASTROPHIC;
		break;
	}
}
+1 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ enum irdma_term_mpa_errors {
enum irdma_qp_event_type {
	IRDMA_QP_EVENT_CATASTROPHIC,
	IRDMA_QP_EVENT_ACCESS_ERR,
	IRDMA_QP_EVENT_REQ_ERR,
};

enum irdma_hw_stats_index_32b {
+1 −0
Original line number Diff line number Diff line
@@ -103,6 +103,7 @@ enum irdma_flush_opcode {
	FLUSH_FATAL_ERR,
	FLUSH_RETRY_EXC_ERR,
	FLUSH_MW_BIND_ERR,
	FLUSH_REM_INV_REQ_ERR,
};

enum irdma_cmpl_status {
+3 −0
Original line number Diff line number Diff line
@@ -2476,6 +2476,9 @@ void irdma_ib_qp_event(struct irdma_qp *iwqp, enum irdma_qp_event_type event)
	case IRDMA_QP_EVENT_ACCESS_ERR:
		ibevent.event = IB_EVENT_QP_ACCESS_ERR;
		break;
	case IRDMA_QP_EVENT_REQ_ERR:
		ibevent.event = IB_EVENT_QP_REQ_ERR;
		break;
	}
	ibevent.device = iwqp->ibqp.device;
	ibevent.element.qp = &iwqp->ibqp;
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