Merge branch 'pci/kernel-doc' (7faf1dac) · Commits · jan.koester / Linux

drivers/pci/ats.c

+1 −1

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		@@ -480,7 +480,7 @@ EXPORT_SYMBOL_GPL(pci_pasid_features);
		#define PASID_NUMBER_SHIFT 8
		#define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
		/**
		* pci_max_pasid - Get maximum number of PASIDs supported by device
		* pci_max_pasids - Get maximum number of PASIDs supported by device
		* @pdev: PCI device structure
		*
		* Returns negative value when PASID capability is not present.

drivers/pci/controller/cadence/pci-j721e.c

+1 −1

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		// SPDX-License-Identifier: GPL-2.0
		/**
		/*
		* pci-j721e - PCIe controller driver for TI's J721E SoCs
		*
		* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com

drivers/pci/controller/dwc/pci-keystone.c

+8 −3

Original line number	Diff line number	Diff line
		@@ -346,8 +346,9 @@ static const struct irq_domain_ops ks_pcie_legacy_irq_domain_ops = {
		};

		/**
		* ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask
		* registers
		* ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers
		* @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone
		* PCIe host controller driver information.
		*
		* Since modification of dbi_cs2 involves different clock domain, read the
		* status back to ensure the transition is complete.
		@@ -367,6 +368,8 @@ static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie)

		/**
		* ks_pcie_clear_dbi_mode() - Disable DBI mode
		* @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone
		* PCIe host controller driver information.
		*
		* Since modification of dbi_cs2 involves different clock domain, read the
		* status back to ensure the transition is complete.
		@@ -449,6 +452,7 @@ static struct pci_ops ks_child_pcie_ops = {

		/**
		* ks_pcie_v3_65_add_bus() - keystone add_bus post initialization
		* @bus: A pointer to the PCI bus structure.
		*
		* This sets BAR0 to enable inbound access for MSI_IRQ register
		*/
		@@ -488,6 +492,8 @@ static struct pci_ops ks_pcie_ops = {

		/**
		* ks_pcie_link_up() - Check if link up
		* @pci: A pointer to the dw_pcie structure which holds the DesignWare PCIe host
		* controller driver information.
		*/
		static int ks_pcie_link_up(struct dw_pcie *pci)
		{
		@@ -605,7 +611,6 @@ static void ks_pcie_msi_irq_handler(struct irq_desc *desc)

		/**
		* ks_pcie_legacy_irq_handler() - Handle legacy interrupt
		* @irq: IRQ line for legacy interrupts
		* @desc: Pointer to irq descriptor
		*
		* Traverse through pending legacy interrupts and invoke handler for each. Also

drivers/pci/endpoint/functions/pci-epf-ntb.c

+11 −5

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		// SPDX-License-Identifier: GPL-2.0
		/**
		/*
		* Endpoint Function Driver to implement Non-Transparent Bridge functionality
		*
		* Copyright (C) 2020 Texas Instruments
		@@ -696,7 +696,8 @@ static void epf_ntb_cmd_handler(struct work_struct *work)

		/**
		* epf_ntb_peer_spad_bar_clear() - Clear Peer Scratchpad BAR
		* @ntb: NTB device that facilitates communication between HOST1 and HOST2
		* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
		* address.
		*
		*+-----------------+------->+------------------+ +-----------------+
		*\| BAR0 \| \| CONFIG REGION \| \| BAR0 \|
		@@ -740,6 +741,7 @@ static void epf_ntb_peer_spad_bar_clear(struct epf_ntb_epc *ntb_epc)
		/**
		* epf_ntb_peer_spad_bar_set() - Set peer scratchpad BAR
		* @ntb: NTB device that facilitates communication between HOST1 and HOST2
		* @type: PRIMARY interface or SECONDARY interface
		*
		*+-----------------+------->+------------------+ +-----------------+
		*\| BAR0 \| \| CONFIG REGION \| \| BAR0 \|
		@@ -808,7 +810,8 @@ static int epf_ntb_peer_spad_bar_set(struct epf_ntb *ntb,

		/**
		* epf_ntb_config_sspad_bar_clear() - Clear Config + Self scratchpad BAR
		* @ntb: NTB device that facilitates communication between HOST1 and HOST2
		* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
		* address.
		*
		* +-----------------+------->+------------------+ +-----------------+
		* \| BAR0 \| \| CONFIG REGION \| \| BAR0 \|
		@@ -851,7 +854,8 @@ static void epf_ntb_config_sspad_bar_clear(struct epf_ntb_epc *ntb_epc)

		/**
		* epf_ntb_config_sspad_bar_set() - Set Config + Self scratchpad BAR
		* @ntb: NTB device that facilitates communication between HOST1 and HOST2
		* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
		* address.
		*
		* +-----------------+------->+------------------+ +-----------------+
		* \| BAR0 \| \| CONFIG REGION \| \| BAR0 \|
		@@ -1312,6 +1316,7 @@ static int epf_ntb_configure_interrupt(struct epf_ntb *ntb,

		/**
		* epf_ntb_alloc_peer_mem() - Allocate memory in peer's outbound address space
		* @dev: The PCI device.
		* @ntb_epc: EPC associated with one of the HOST whose BAR holds peer's outbound
		* address
		* @bar: BAR of @ntb_epc in for which memory has to be allocated (could be
		@@ -1660,7 +1665,6 @@ static int epf_ntb_init_epc_bar_interface(struct epf_ntb *ntb,
		* epf_ntb_init_epc_bar() - Identify BARs to be used for each of the NTB
		* constructs (scratchpad region, doorbell, memorywindow)
		* @ntb: NTB device that facilitates communication between HOST1 and HOST2
		* @type: PRIMARY interface or SECONDARY interface
		*
		* Wrapper to epf_ntb_init_epc_bar_interface() to identify the free BARs
		* to be used for each of BAR_CONFIG, BAR_PEER_SPAD, BAR_DB_MW1, BAR_MW2,
		@@ -2037,6 +2041,8 @@ static const struct config_item_type ntb_group_type = {
		/**
		* epf_ntb_add_cfs() - Add configfs directory specific to NTB
		* @epf: NTB endpoint function device
		* @group: A pointer to the config_group structure referencing a group of
		* config_items of a specific type that belong to a specific sub-system.
		*
		* Add configfs directory specific to NTB. This directory will hold
		* NTB specific properties like db_count, spad_count, num_mws etc.,

drivers/pci/endpoint/functions/pci-epf-test.c

+1 −1

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		// SPDX-License-Identifier: GPL-2.0
		/**
		/*
		* Test driver to test endpoint functionality
		*
		* Copyright (C) 2017 Texas Instruments