Commit 7ff9a17e authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915: Make the CRTC state consistent during sanitize-disabling 



Make sure that the CRTC state is reset correctly, as expected after
disabling the CRTC.

In particular this change will:
- Zero all the CSC blob pointers after intel_crtc_free_hw_state()
  has freed them.
- Zero the shared DPLL and port PLL pointers and clear the
  corresponding CRTC reference flag in the PLL state.
- Reset all the transcoder and pipe fields.

v2:
- Reset fully the CRTC state. (Ville)
- Clear pipe active flags in the DPLL state.

v3:
- Clear only the CRTC reference flag and add a helper for this.
  (Ville)

v4:
- Rebased on previous patch, adding
  intel_unreference_shared_dpll_crtc() separately. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230510103131.1618266-4-imre.deak@intel.com
parent 0694cab1

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -399,7 +399,7 @@ intel_reference_shared_dpll(struct intel_atomic_state *state, 
 *

 *

 * Drop a reference for @pll tracking the end of use of it by @crtc.

 * Drop a reference for @pll tracking the end of use of it by @crtc.

 */

 */

static void

void

intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,

intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,

				   const struct intel_shared_dpll *pll,

				   const struct intel_shared_dpll *pll,

				   struct intel_shared_dpll_state *shared_dpll_state)

				   struct intel_shared_dpll_state *shared_dpll_state)

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -341,6 +341,9 @@ int intel_reserve_shared_dplls(struct intel_atomic_state *state, 
			       struct intel_encoder *encoder);

			       struct intel_encoder *encoder);

void intel_release_shared_dplls(struct intel_atomic_state *state,

void intel_release_shared_dplls(struct intel_atomic_state *state,

				struct intel_crtc *crtc);

				struct intel_crtc *crtc);

void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,

					const struct intel_shared_dpll *pll,

					struct intel_shared_dpll_state *shared_dpll_state);

void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,

void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,

			      enum icl_port_dpll_id port_dpll_id);

			      enum icl_port_dpll_id port_dpll_id);

void intel_update_active_dpll(struct intel_atomic_state *state,

void intel_update_active_dpll(struct intel_atomic_state *state,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

+7 −6
Original line number Original line Diff line number Diff line
@@ -88,13 +88,14 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, 
	crtc->active = false;

	crtc->active = false;

	crtc->base.enabled = false;

	crtc->base.enabled = false;





	drm_WARN_ON(&i915->drm,

	if (crtc_state->shared_dpll)

		    drm_atomic_set_mode_for_crtc(&crtc_state->uapi, NULL) < 0);

		intel_unreference_shared_dpll_crtc(crtc,

	crtc_state->uapi.active = false;

						   crtc_state->shared_dpll,

	crtc_state->uapi.connector_mask = 0;

						   &crtc_state->shared_dpll->state);

	crtc_state->uapi.encoder_mask = 0;



	__drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);

	intel_crtc_free_hw_state(crtc_state);

	intel_crtc_free_hw_state(crtc_state);

	memset(&crtc_state->hw, 0, sizeof(crtc_state->hw));

	intel_crtc_state_reset(crtc_state, crtc);





	for_each_encoder_on_crtc(&i915->drm, &crtc->base, encoder)

	for_each_encoder_on_crtc(&i915->drm, &crtc->base, encoder)

		encoder->base.crtc = NULL;

		encoder->base.crtc = NULL;