Loading arch/hexagon/kernel/ptrace.c +21 −41 Original line number Diff line number Diff line Loading @@ -35,58 +35,38 @@ void user_disable_single_step(struct task_struct *child) static int genregs_get(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, void *kbuf, void __user *ubuf) srtuct membuf to) { int ret; unsigned int dummy; struct pt_regs *regs = task_pt_regs(target); if (!regs) return -EIO; /* The general idea here is that the copyout must happen in * exactly the same order in which the userspace expects these * regs. Now, the sequence in userspace does not match the * sequence in the kernel, so everything past the 32 gprs * happens one at a time. */ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, ®s->r00, 0, 32*sizeof(unsigned long)); #define ONEXT(KPT_REG, USR_REG) \ if (!ret) \ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, \ KPT_REG, offsetof(struct user_regs_struct, USR_REG), \ offsetof(struct user_regs_struct, USR_REG) + \ sizeof(unsigned long)); membuf_write(&to, ®s->r00, 32*sizeof(unsigned long)); /* Must be exactly same sequence as struct user_regs_struct */ ONEXT(®s->sa0, sa0); ONEXT(®s->lc0, lc0); ONEXT(®s->sa1, sa1); ONEXT(®s->lc1, lc1); ONEXT(®s->m0, m0); ONEXT(®s->m1, m1); ONEXT(®s->usr, usr); ONEXT(®s->preds, p3_0); ONEXT(®s->gp, gp); ONEXT(®s->ugp, ugp); ONEXT(&pt_elr(regs), pc); dummy = pt_cause(regs); ONEXT(&dummy, cause); ONEXT(&pt_badva(regs), badva); membuf_store(&to, regs->sa0); membuf_store(&to, regs->lc0); membuf_store(&to, regs->sa1); membuf_store(&to, regs->lc1); membuf_store(&to, regs->m0); membuf_store(&to, regs->m1); membuf_store(&to, regs->usr); membuf_store(&to, regs->p3_0); membuf_store(&to, regs->gp); membuf_store(&to, regs->ugp); membuf_store(&to, pt_elr(regs)); // pc membuf_store(&to, (unsigned long)pt_cause(regs)); // cause membuf_store(&to, pt_badva(regs)); // badva #if CONFIG_HEXAGON_ARCH_VERSION >=4 ONEXT(®s->cs0, cs0); ONEXT(®s->cs1, cs1); membuf_store(&to, regs->cs0); membuf_store(&to, regs->cs1); return membuf_zero(&to, sizeof(unsigned long)); #else return membuf_zero(&to, 3 * sizeof(unsigned long)); #endif /* Pad the rest with zeros, if needed */ if (!ret) ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offsetof(struct user_regs_struct, pad1), -1); return ret; } static int genregs_set(struct task_struct *target, Loading Loading @@ -159,7 +139,7 @@ static const struct user_regset hexagon_regsets[] = { .n = ELF_NGREG, .size = sizeof(unsigned long), .align = sizeof(unsigned long), .get = genregs_get, .regset_get = genregs_get, .set = genregs_set, }, }; Loading Loading
arch/hexagon/kernel/ptrace.c +21 −41 Original line number Diff line number Diff line Loading @@ -35,58 +35,38 @@ void user_disable_single_step(struct task_struct *child) static int genregs_get(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, void *kbuf, void __user *ubuf) srtuct membuf to) { int ret; unsigned int dummy; struct pt_regs *regs = task_pt_regs(target); if (!regs) return -EIO; /* The general idea here is that the copyout must happen in * exactly the same order in which the userspace expects these * regs. Now, the sequence in userspace does not match the * sequence in the kernel, so everything past the 32 gprs * happens one at a time. */ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, ®s->r00, 0, 32*sizeof(unsigned long)); #define ONEXT(KPT_REG, USR_REG) \ if (!ret) \ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, \ KPT_REG, offsetof(struct user_regs_struct, USR_REG), \ offsetof(struct user_regs_struct, USR_REG) + \ sizeof(unsigned long)); membuf_write(&to, ®s->r00, 32*sizeof(unsigned long)); /* Must be exactly same sequence as struct user_regs_struct */ ONEXT(®s->sa0, sa0); ONEXT(®s->lc0, lc0); ONEXT(®s->sa1, sa1); ONEXT(®s->lc1, lc1); ONEXT(®s->m0, m0); ONEXT(®s->m1, m1); ONEXT(®s->usr, usr); ONEXT(®s->preds, p3_0); ONEXT(®s->gp, gp); ONEXT(®s->ugp, ugp); ONEXT(&pt_elr(regs), pc); dummy = pt_cause(regs); ONEXT(&dummy, cause); ONEXT(&pt_badva(regs), badva); membuf_store(&to, regs->sa0); membuf_store(&to, regs->lc0); membuf_store(&to, regs->sa1); membuf_store(&to, regs->lc1); membuf_store(&to, regs->m0); membuf_store(&to, regs->m1); membuf_store(&to, regs->usr); membuf_store(&to, regs->p3_0); membuf_store(&to, regs->gp); membuf_store(&to, regs->ugp); membuf_store(&to, pt_elr(regs)); // pc membuf_store(&to, (unsigned long)pt_cause(regs)); // cause membuf_store(&to, pt_badva(regs)); // badva #if CONFIG_HEXAGON_ARCH_VERSION >=4 ONEXT(®s->cs0, cs0); ONEXT(®s->cs1, cs1); membuf_store(&to, regs->cs0); membuf_store(&to, regs->cs1); return membuf_zero(&to, sizeof(unsigned long)); #else return membuf_zero(&to, 3 * sizeof(unsigned long)); #endif /* Pad the rest with zeros, if needed */ if (!ret) ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offsetof(struct user_regs_struct, pad1), -1); return ret; } static int genregs_set(struct task_struct *target, Loading Loading @@ -159,7 +139,7 @@ static const struct user_regset hexagon_regsets[] = { .n = ELF_NGREG, .size = sizeof(unsigned long), .align = sizeof(unsigned long), .get = genregs_get, .regset_get = genregs_get, .set = genregs_set, }, }; Loading