Commit 83ba46e3 authored by Cristian Ciocaltea's avatar Cristian Ciocaltea Committed by Manivannan Sadhasivam
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arm: dts: owl-s500: Add I2C support 



Add I2C controller nodes for Actions Semi S500 SoC.

Signed-off-by: default avatarCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent 481c6405

arch/arm/boot/dts/owl-s500.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -193,6 +193,46 @@ cmu: clock-controller@b0160000 { 
			#reset-cells = <1>;

		};



		i2c0: i2c@b0170000 {

			compatible = "actions,s500-i2c";

			reg = <0xb0170000 0x4000>;

			clocks = <&cmu CLK_I2C0>;

			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c1: i2c@b0174000 {

			compatible = "actions,s500-i2c";

			reg = <0xb0174000 0x4000>;

			clocks = <&cmu CLK_I2C1>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c2: i2c@b0178000 {

			compatible = "actions,s500-i2c";

			reg = <0xb0178000 0x4000>;

			clocks = <&cmu CLK_I2C2>;

			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c3: i2c@b017c000 {

			compatible = "actions,s500-i2c";

			reg = <0xb017c000 0x4000>;

			clocks = <&cmu CLK_I2C3>;

			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		timer: timer@b0168000 {

			compatible = "actions,s500-timer";

			reg = <0xb0168000 0x8000>;