Commit 8416262b authored by Marijn Suijten's avatar Marijn Suijten Committed by Bjorn Andersson
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arm64: dts: qcom: sm6125: Reorder HSUSB PHY clocks to match bindings 



Reorder the clocks and corresponding names to match the QUSB2 phy
schema, fixing the following CHECK_DTBS errors:

    arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:0: 'cfg_ahb' was expected
            From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
    arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:1: 'ref' was expected
            From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml

Fixes: cff4bbaf ("arm64: dts: qcom: Add support for SM6125")
Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: default avatarMartin Botka <martin.botka@somainline.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221216213343.1140143-1-marijn.suijten@somainline.org
parent fa7ff6e9

arch/arm64/boot/dts/qcom/sm6125.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -444,9 +444,9 @@ hsusb_phy1: phy@1613000 { 
			reg = <0x01613000 0x180>;

			#phy-cells = <0>;



			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,

				 <&gcc GCC_AHB2PHY_USB_CLK>;

			clock-names = "ref", "cfg_ahb";

			clocks = <&gcc GCC_AHB2PHY_USB_CLK>,

				 <&rpmcc RPM_SMD_XO_CLK_SRC>;

			clock-names = "cfg_ahb", "ref";



			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;

			status = "disabled";