Commit 86160461 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
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KVM: PPC: Book3S HV: HFSCR[PREFIX] does not exist 



This facility is controlled by FSCR only. Reserved bits should not be
set in the HFSCR register (although it's likely harmless as this
position would not be re-used, and the L0 is forgiving here too).

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Reviewed-by: default avatarFabiano Rosas <farosas@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220122105639.3477407-1-npiggin@gmail.com
parent ce522ba9

arch/powerpc/include/asm/reg.h

+0 −1
Original line number Diff line number Diff line
@@ -417,7 +417,6 @@ 
#define   FSCR_DSCR	__MASK(FSCR_DSCR_LG)

#define   FSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56)	/* interrupt cause */

#define SPRN_HFSCR	0xbe	/* HV=1 Facility Status & Control Register */

#define   HFSCR_PREFIX	__MASK(FSCR_PREFIX_LG)

#define   HFSCR_MSGP	__MASK(FSCR_MSGP_LG)

#define   HFSCR_TAR	__MASK(FSCR_TAR_LG)

#define   HFSCR_EBB	__MASK(FSCR_EBB_LG)

arch/powerpc/kvm/book3s_hv.c

+1 −1
Original line number Diff line number Diff line
@@ -2834,7 +2834,7 @@ static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 
	 * to trap and then we emulate them.

	 */

	vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |

		HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP | HFSCR_PREFIX;

		HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;

	if (cpu_has_feature(CPU_FTR_HVMODE)) {

		vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM