Commit 86edcc7d authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: move umc late init from gmc to umc block 



umc late init is umc specific, it's more suitable to be put in umc block

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarGuchun Chen <guchun.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1bd252c5

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ 
	amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \

	amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \

	amdgpu_vm_sdma.o amdgpu_pmu.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \

	smu_v11_0_i2c.o

	amdgpu_umc.o smu_v11_0_i2c.o



amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

+0 −48
Original line number Diff line number Diff line
@@ -306,51 +306,3 @@ bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr, 
	gmc->fault_hash[hash].idx = gmc->last_fault++;

	return false;

}
 


int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev,

			     void *ras_ih_info)

{

	int r;

	struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info;

	struct ras_fs_if fs_info = {

		.sysfs_name = "umc_err_count",

		.debugfs_name = "umc_err_inject",

	};



	if (!ih_info)

		return -EINVAL;



	if (!adev->gmc.umc_ras_if) {

		adev->gmc.umc_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);

		if (!adev->gmc.umc_ras_if)

			return -ENOMEM;

		adev->gmc.umc_ras_if->block = AMDGPU_RAS_BLOCK__UMC;

		adev->gmc.umc_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->gmc.umc_ras_if->sub_block_index = 0;

		strcpy(adev->gmc.umc_ras_if->name, "umc");

	}

	ih_info->head = fs_info.head = *adev->gmc.umc_ras_if;



	r = amdgpu_ras_late_init(adev, adev->gmc.umc_ras_if,

				 &fs_info, ih_info);

	if (r)

		goto free;



	if (amdgpu_ras_is_supported(adev, adev->gmc.umc_ras_if->block)) {

		r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);

		if (r)

			goto late_fini;

	} else {

		r = 0;

		goto free;

	}



	return 0;



late_fini:

	amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, ih_info);

free:

	kfree(adev->gmc.umc_ras_if);

	adev->gmc.umc_ras_if = NULL;

	return r;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+0 −2
Original line number Diff line number Diff line
@@ -234,7 +234,5 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, 
			     struct amdgpu_gmc *mc);

bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr,

			      uint16_t pasid, uint64_t timestamp);

int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev,

			     void *ih_info);



#endif

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c

0 → 100644
+73 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2019 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */



#include "amdgpu.h"

#include "amdgpu_ras.h"



int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info)

{

	int r;

	struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info;

	struct ras_fs_if fs_info = {

		.sysfs_name = "umc_err_count",

		.debugfs_name = "umc_err_inject",

	};



	if (!ih_info)

		return -EINVAL;



	if (!adev->gmc.umc_ras_if) {

		adev->gmc.umc_ras_if =

			kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);

		if (!adev->gmc.umc_ras_if)

			return -ENOMEM;

		adev->gmc.umc_ras_if->block = AMDGPU_RAS_BLOCK__UMC;

		adev->gmc.umc_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->gmc.umc_ras_if->sub_block_index = 0;

		strcpy(adev->gmc.umc_ras_if->name, "umc");

	}

	ih_info->head = fs_info.head = *adev->gmc.umc_ras_if;



	r = amdgpu_ras_late_init(adev, adev->gmc.umc_ras_if,

				 &fs_info, ih_info);

	if (r)

		goto free;



	if (amdgpu_ras_is_supported(adev, adev->gmc.umc_ras_if->block)) {

		r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);

		if (r)

			goto late_fini;

	} else {

		r = 0;

		goto free;

	}



	return 0;



late_fini:

	amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, ih_info);

free:

	kfree(adev->gmc.umc_ras_if);

	adev->gmc.umc_ras_if = NULL;

	return r;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h

+2 −0
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ 


struct amdgpu_umc_funcs {

	void (*ras_init)(struct amdgpu_device *adev);

	int (*ras_late_init)(struct amdgpu_device *adev, void *ras_ih_info);

	void (*query_ras_error_count)(struct amdgpu_device *adev,

					void *ras_error_status);

	void (*query_ras_error_address)(struct amdgpu_device *adev,
@@ -79,4 +80,5 @@ struct amdgpu_umc { 
	const struct amdgpu_umc_funcs *funcs;

};



int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info);

#endif