Commit 87c86024 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo: move PBDMA init to runq 



- bumps pbdma timeout to value RM uses on newer HW
- bumps fb timeout to max from boot default
- one/both of these greatly improves stability on // piglit runs

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 324176e7

drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c

+3 −0
Original line number Diff line number Diff line
@@ -192,6 +192,9 @@ nvkm_fifo_init(struct nvkm_engine *engine) 
			mask |= BIT(runq->id);



		fifo->func->init_pbdmas(fifo, mask);



		nvkm_runq_foreach(runq, fifo)

			runq->func->init(runq);

	}



	fifo->func->init(fifo);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

+11 −10
Original line number Diff line number Diff line
@@ -97,8 +97,19 @@ gf100_fifo_intr_pbdma(struct gf100_fifo *fifo, int unit) 
	nvkm_wr32(device, 0x040108 + (unit * 0x2000), stat);

}



void

gf100_runq_init(struct nvkm_runq *runq)

{

	struct nvkm_device *device = runq->fifo->engine.subdev.device;



	nvkm_mask(device, 0x04013c + (runq->id * 0x2000), 0x10000100, 0x00000000);

	nvkm_wr32(device, 0x040108 + (runq->id * 0x2000), 0xffffffff); /* INTR */

	nvkm_wr32(device, 0x04010c + (runq->id * 0x2000), 0xfffffeff); /* INTREN */

}



static const struct nvkm_runq_func

gf100_runq = {

	.init = gf100_runq_init,

};



void
@@ -653,14 +664,6 @@ gf100_fifo_init(struct nvkm_fifo *base) 
{

	struct gf100_fifo *fifo = gf100_fifo(base);

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	int i;



	/* PBDMA[n] */

	for (i = 0; i < fifo->pbdma_nr; i++) {

		nvkm_mask(device, 0x04013c + (i * 0x2000), 0x10000100, 0x00000000);

		nvkm_wr32(device, 0x040108 + (i * 0x2000), 0xffffffff); /* INTR */

		nvkm_wr32(device, 0x04010c + (i * 0x2000), 0xfffffeff); /* INTREN */

	}



	nvkm_mask(device, 0x002200, 0x00000001, 0x00000001);

	nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12);
@@ -716,8 +719,6 @@ gf100_fifo_oneinit(struct nvkm_fifo *base) 
	struct nvkm_vmm *bar = nvkm_bar_bar1_vmm(device);

	int ret;



	fifo->pbdma_nr = fifo->base.func->runq_nr(&fifo->base);



	ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000,

			      false, &fifo->runlist.mem[0]);

	if (ret)

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h

+0 −2
Original line number Diff line number Diff line
@@ -17,8 +17,6 @@ struct gf100_fifo { 
		u64 mask;

	} recover;



	int pbdma_nr;



	struct {

		struct nvkm_memory *mem[2];

		int active;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

+12 −24
Original line number Diff line number Diff line
@@ -164,6 +164,17 @@ static const struct nvkm_bitfield gk104_fifo_pbdma_intr_0[] = { 
	{}

};



void

gk104_runq_init(struct nvkm_runq *runq)

{

	struct nvkm_device *device = runq->fifo->engine.subdev.device;



	gf100_runq_init(runq);



	nvkm_wr32(device, 0x040148 + (runq->id * 0x2000), 0xffffffff); /* HCE.INTR */

	nvkm_wr32(device, 0x04014c + (runq->id * 0x2000), 0xffffffff); /* HCE.INTREN */

}



static u32

gk104_runq_runm(struct nvkm_runq *runq)

{
@@ -172,6 +183,7 @@ gk104_runq_runm(struct nvkm_runq *runq) 


const struct nvkm_runq_func

gk104_runq = {

	.init = gk104_runq_init,

};



void
@@ -278,10 +290,6 @@ static const struct nvkm_runl_func 
gk104_runl = {

};



const struct gk104_fifo_pbdma_func

gk104_fifo_pbdma = {

};



int

gk104_fifo_engine_id(struct nvkm_fifo *base, struct nvkm_engine *engine)

{
@@ -968,26 +976,9 @@ gk104_fifo_init(struct nvkm_fifo *base) 
{

	struct gk104_fifo *fifo = gk104_fifo(base);

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	int i;



	/* PBDMA[n] */

	for (i = 0; i < fifo->pbdma_nr; i++) {

		nvkm_mask(device, 0x04013c + (i * 0x2000), 0x10000100, 0x00000000);

		nvkm_wr32(device, 0x040108 + (i * 0x2000), 0xffffffff); /* INTR */

		nvkm_wr32(device, 0x04010c + (i * 0x2000), 0xfffffeff); /* INTREN */

	}



	/* PBDMA[n].HCE */

	for (i = 0; i < fifo->pbdma_nr; i++) {

		nvkm_wr32(device, 0x040148 + (i * 0x2000), 0xffffffff); /* INTR */

		nvkm_wr32(device, 0x04014c + (i * 0x2000), 0xffffffff); /* INTREN */

	}



	nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12);



	if (fifo->func->pbdma->init_timeout)

		fifo->func->pbdma->init_timeout(fifo);



	nvkm_wr32(device, 0x002100, 0xffffffff);

	nvkm_wr32(device, 0x002140, 0x7fffffff);

}
@@ -1054,8 +1045,6 @@ gk104_fifo_oneinit(struct nvkm_fifo *base) 
	struct nvkm_top_device *tdev;

	int ret, i, j;



	fifo->pbdma_nr = fifo->func->runq_nr(&fifo->base);



	/* Determine runlist configuration from topology device info. */

	list_for_each_entry(tdev, &device->top->device, head) {

		const int engn = tdev->engine;
@@ -1158,7 +1147,6 @@ gk104_fifo = { 
	.engine_id = gk104_fifo_engine_id,

	.recover_chan = gk104_fifo_recover_chan,

	.runlist = &gk104_fifo_runlist,

	.pbdma = &gk104_fifo_pbdma,

	.nonstall = &gf100_fifo_nonstall,

	.runl = &gk104_runl,

	.runq = &gk104_runq,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h

+0 −6
Original line number Diff line number Diff line
@@ -21,8 +21,6 @@ struct gk104_fifo { 
		u32 runm;

	} recover;



	int pbdma_nr;



	struct {

		struct nvkm_engine *engine;

		int runl;
@@ -74,7 +72,6 @@ int gk104_fifo_oneinit(struct nvkm_fifo *); 
void gk104_fifo_init(struct nvkm_fifo *base);

void gk104_fifo_fini(struct nvkm_fifo *base);



extern const struct gk104_fifo_pbdma_func gk104_fifo_pbdma;

extern const struct nvkm_enum gk104_fifo_fault_access[];

extern const struct nvkm_enum gk104_fifo_fault_engine[];

extern const struct nvkm_enum gk104_fifo_fault_reason[];
@@ -90,14 +87,11 @@ extern const struct gk104_fifo_runlist_func gk110_fifo_runlist; 
void gk110_fifo_runlist_cgrp(struct nvkm_fifo_cgrp *,

			     struct nvkm_memory *, u32);



extern const struct gk104_fifo_pbdma_func gk208_fifo_pbdma;

void gk208_fifo_pbdma_init_timeout(struct gk104_fifo *);



extern const struct nvkm_enum gm107_fifo_fault_engine[];

extern const struct gk104_fifo_runlist_func gm107_fifo_runlist;



extern const struct gk104_fifo_pbdma_func gm200_fifo_pbdma;



extern const struct nvkm_enum gp100_fifo_fault_engine[];



extern const struct nvkm_enum gv100_fifo_fault_access[];