Commit 87f846c7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-dt64-5.6' of... 

Merge tag 'imx-dt64-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.6:

 - New board support: i.MX8MQ based Thor96 board, Google i.MX8MQ Phanbell
   board, LX2160A based Solidrun Clearfog CX and Honeycomb boards.
 - Add eLCDIF controller and missing SAI nodes for i.MX8MQ SoC.
 - Add Crypto CAAM support for i.MX8MM and i.MX8MN.
 - Drop unneeded "simple-bus" from anatop node on i.MX8MM and i.MX8MN.
 - Drop unused/undocumented "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
   compatibles from i.MX8M SoCs.
 - Add DDR controller nodes for i.MX8M devices.
 - Add EEPROM description for imx8mq-hummingboard-pulse and
   imx8mq-sr-som boards.
 - Enable USB1 and TypeC support for imx8mn-evk board.
 - Add FlexSPI and QSPI support for a few Layerscape SoCs and boards.
 - Add External MDIO1 node and the two RGMII PHYs connected on LX2160A.
 - Add missing SAI devices and set SAIs into async mode on LS1028A.
 - Other random device additions and enhancement for various platforms.

* tag 'imx-dt64-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits)
  arm64: dts: imx8mn: Memory node should be in board DT
  arm64: dts: imx8mm: Memory node should be in board DT
  arm64: dts: imx8mn: add crypto node
  arm64: dts: imx8mq-hummingboard-pulse: add eeprom description
  arm64: dts: imx8mq-sr-som: add eeprom description
  arm64: dts: ls208xa: Update qspi node properties for LS2088ARDB
  arm64: dts: freescale: Add devicetree support for Thor96 board
  arm64: dts: imx8mq-librem5-devkit: add accelerometer and gyro sensor
  arm64: dts: imx8mm: Add Crypto CAAM support
  arm64: dts: freescale: add initial support for Google i.MX 8MQ Phanbell
  arm64: dts: ls1028a-rdb: enable emmc hs400 mode
  arm64: dts: ls1028a: Update edma compatible to fit eDMA driver
  arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
  arm64: dts: imx8mm: Add missing mux options for UART1 and UART2 signals
  arm64: dts: lx2160a: add dts for CEX7 platforms
  arm64: dts: lx2160a: add emdio2 node
  arm64: dts: ls1028a: put SAIs into async mode
  arm64: dts: ls1028a: add missing sai nodes
  arm64: dts: imx8mn-evk: enable usb1 and typec support
  arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF
  ...

Link: https://lore.kernel.org/r/20200113034006.17430-5-shawnguo@kernel.org


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 78c47fea c16b4571

arch/arm64/boot/dts/freescale/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb 
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
@@ -28,7 +30,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-phanbell.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-thor96.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb

arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts

+15 −0
Original line number Diff line number Diff line
@@ -123,6 +123,21 @@ &esdhc1 { 
	status = "okay";

};



&fspi {

	status = "okay";



	mt35xu02g0: flash@0 {

		compatible = "jedec,spi-nor";

		#address-cells = <1>;

		#size-cells = <1>;

		spi-max-frequency = <50000000>;

		/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */

		spi-rx-bus-width = <8>; /* 8 SPI Rx lines */

		spi-tx-bus-width = <1>; /* 1 SPI Tx line */

		reg = <0>;

	};

};



&i2c0 {

	status = "okay";

arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts

+17 −0
Original line number Diff line number Diff line
@@ -93,9 +93,26 @@ &esdhc { 


&esdhc1 {

	mmc-hs200-1_8v;

	mmc-hs400-1_8v;

	bus-width = <8>;

	status = "okay";

};



&fspi {

	status = "okay";



	mt35xu02g0: flash@0 {

		compatible = "jedec,spi-nor";

		#address-cells = <1>;

		#size-cells = <1>;

		spi-max-frequency = <50000000>;

		/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */

		spi-rx-bus-width = <8>; /* 8 SPI Rx lines */

		spi-tx-bus-width = <1>; /* 1 SPI Tx line */

		reg = <0>;

	};

};



&i2c0 {

	status = "okay";

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+62 −1
Original line number Diff line number Diff line
@@ -271,6 +271,19 @@ i2c7: i2c@2070000 { 
			status = "disabled";

		};



		fspi: spi@20c0000 {

			compatible = "nxp,lx2160a-fspi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x20c0000 0x0 0x10000>,

			      <0x0 0x20000000 0x0 0x10000000>;

			reg-names = "fspi_base", "fspi_mmap";

			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 3>, <&clockgen 4 3>;

			clock-names = "fspi_en", "fspi";

			status = "disabled";

		};



		esdhc: mmc@2140000 {

			compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";

			reg = <0x0 0x2140000 0x0 0x10000>;
@@ -316,7 +329,7 @@ duart1: serial@21c0600 { 


		edma0: dma-controller@22c0000 {

			#dma-cells = <2>;

			compatible = "fsl,vf610-edma";

			compatible = "fsl,ls1028a-edma";

			reg = <0x0 0x22c0000 0x0 0x10000>,

			      <0x0 0x22d0000 0x0 0x10000>,

			      <0x0 0x22e0000 0x0 0x10000>;
@@ -528,6 +541,7 @@ sai1: audio-controller@f100000 { 
			dma-names = "tx", "rx";

			dmas = <&edma0 1 4>,

			       <&edma0 1 3>;

			fsl,sai-asynchronous;

			status = "disabled";

		};
@@ -542,6 +556,22 @@ sai2: audio-controller@f110000 { 
			dma-names = "tx", "rx";

			dmas = <&edma0 1 6>,

			       <&edma0 1 5>;

			fsl,sai-asynchronous;

			status = "disabled";

		};



		sai3: audio-controller@f120000 {

			#sound-dai-cells = <0>;

			compatible = "fsl,vf610-sai";

			reg = <0x0 0xf120000 0x0 0x10000>;

			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				 <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "bus", "mclk1", "mclk2", "mclk3";

			dma-names = "tx", "rx";

			dmas = <&edma0 1 8>,

			       <&edma0 1 7>;

			fsl,sai-asynchronous;

			status = "disabled";

		};
@@ -556,6 +586,37 @@ sai4: audio-controller@f130000 { 
			dma-names = "tx", "rx";

			dmas = <&edma0 1 10>,

			       <&edma0 1 9>;

			fsl,sai-asynchronous;

			status = "disabled";

		};



		sai5: audio-controller@f140000 {

			#sound-dai-cells = <0>;

			compatible = "fsl,vf610-sai";

			reg = <0x0 0xf140000 0x0 0x10000>;

			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				 <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "bus", "mclk1", "mclk2", "mclk3";

			dma-names = "tx", "rx";

			dmas = <&edma0 1 12>,

			       <&edma0 1 11>;

			fsl,sai-asynchronous;

			status = "disabled";

		};



		sai6: audio-controller@f150000 {

			#sound-dai-cells = <0>;

			compatible = "fsl,vf610-sai";

			reg = <0x0 0xf150000 0x0 0x10000>;

			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				 <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "bus", "mclk1", "mclk2", "mclk3";

			dma-names = "tx", "rx";

			dmas = <&edma0 1 14>,

			       <&edma0 1 13>;

			fsl,sai-asynchronous;

			status = "disabled";

		};

arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy.dts

+14 −0
Original line number Diff line number Diff line
@@ -112,6 +112,20 @@ nand@0,0 { 


};



&qspi {

	status = "okay";



	mt25qu512a0: flash@0 {

		compatible = "jedec,spi-nor";

		#address-cells = <1>;

		#size-cells = <1>;

		spi-max-frequency = <50000000>;

		spi-rx-bus-width = <4>;

		spi-tx-bus-width = <1>;

		reg = <0>;

	};

};



#include "fsl-ls1046-post.dtsi"



&fman0 {