Commit 88ea6989 authored by Samuel Holland's avatar Samuel Holland Committed by Jernej Skrabec
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riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree



"D1 Nezha" is Allwinner's first-party development board for the D1 SoC.
It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio,
HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports,
plus low-speed I/O from the SoC and a GPIO expander chip.

Acked-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: default avatarGuo Ren <guoren@kernel.org>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Tested-by: default avatarConor Dooley <conor.dooley@microchip.com>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230126045738.47903-7-samuel@sholland.org


Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
parent 2a93adfb
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-nezha.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1s-mangopi-mq.dtb
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// SPDX-License-Identifier: (GPL-2.0+ or MIT)
// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/dts-v1/;

#include "sun20i-d1.dtsi"
#include "sun20i-common-regulators.dtsi"

/ {
	model = "Allwinner D1 Nezha";
	compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1";

	aliases {
		ethernet0 = &emac;
		ethernet1 = &xr829;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	reg_usbvbus: usbvbus {
		compatible = "regulator-fixed";
		regulator-name = "usbvbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
		enable-active-high;
		vin-supply = <&reg_vcc>;
	};

	/*
	 * This regulator is PWM-controlled, but the PWM controller is not
	 * yet supported, so fix the regulator to its default voltage.
	 */
	reg_vdd_cpu: vdd-cpu {
		compatible = "regulator-fixed";
		regulator-name = "vdd-cpu";
		regulator-min-microvolt = <1100000>;
		regulator-max-microvolt = <1100000>;
		vin-supply = <&reg_vcc>;
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
	};
};

&cpu0 {
	cpu-supply = <&reg_vdd_cpu>;
};

&dcxo {
	clock-frequency = <24000000>;
};

&ehci0 {
	status = "okay";
};

&ehci1 {
	status = "okay";
};

&emac {
	pinctrl-0 = <&rgmii_pe_pins>;
	pinctrl-names = "default";
	phy-handle = <&ext_rgmii_phy>;
	phy-mode = "rgmii-id";
	phy-supply = <&reg_vcc_3v3>;
	status = "okay";
};

&i2c2 {
	pinctrl-0 = <&i2c2_pb0_pins>;
	pinctrl-names = "default";
	status = "okay";

	pcf8574a: gpio@38 {
		compatible = "nxp,pcf8574a";
		reg = <0x38>;
		interrupt-parent = <&pio>;
		interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */
		interrupt-controller;
		gpio-controller;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
	};
};

&mdio {
	ext_rgmii_phy: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mmc0 {
	bus-width = <4>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
	disable-wp;
	vmmc-supply = <&reg_vcc_3v3>;
	vqmmc-supply = <&reg_vcc_3v3>;
	pinctrl-0 = <&mmc0_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&mmc1 {
	bus-width = <4>;
	mmc-pwrseq = <&wifi_pwrseq>;
	non-removable;
	vmmc-supply = <&reg_vcc_3v3>;
	vqmmc-supply = <&reg_vcc_3v3>;
	pinctrl-0 = <&mmc1_pins>;
	pinctrl-names = "default";
	status = "okay";

	xr829: wifi@1 {
		reg = <1>;
		interrupt-parent = <&pio>;
		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
		interrupt-names = "host-wake";
	};
};

&ohci0 {
	status = "okay";
};

&ohci1 {
	status = "okay";
};

&uart0 {
	pinctrl-0 = <&uart0_pb8_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&uart1 {
	uart-has-rtscts;
	pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
	pinctrl-names = "default";
	status = "okay";

	/* XR829 bluetooth is connected here */
};

&usb_otg {
	dr_mode = "otg";
	status = "okay";
};

&usbphy {
	usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
	usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
	usb0_vbus-supply = <&reg_usbvbus>;
	usb1_vbus-supply = <&reg_vcc>;
	status = "okay";
};