Commit 89390c49 authored by Daniel Miess's avatar Daniel Miess Committed by Alex Deucher
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drm/amd/display: Use pixels per container logic for DCN314 DCCG dividers 



[Why]
DP DSC YCbCr422 not working because dcn314_calculate_dccg_k1_k2_values
does not account for two pixels per container

[How]
Replace the contents of dcn314_calculate_dccg_k1_k2_values with the
code from the function dcn32_calculate_dccg_k1_k2_values

Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Signed-off-by: default avatarDaniel Miess <Daniel.Miess@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1ff77bea

drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c

+7 −7
Original line number Diff line number Diff line
@@ -343,7 +343,10 @@ unsigned int dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsig 
{

	struct dc_stream_state *stream = pipe_ctx->stream;

	unsigned int odm_combine_factor = 0;

	struct dc *dc = pipe_ctx->stream->ctx->dc;

	bool two_pix_per_container = false;



	two_pix_per_container = optc2_is_two_pixels_per_containter(&stream->timing);

	odm_combine_factor = get_odm_config(pipe_ctx, NULL);



	if (is_dp_128b_132b_signal(pipe_ctx)) {
@@ -355,16 +358,13 @@ unsigned int dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsig 
		else

			*k2_div = PIXEL_RATE_DIV_BY_4;

	} else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

		if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) {

		if (two_pix_per_container) {

			*k1_div = PIXEL_RATE_DIV_BY_1;

			*k2_div = PIXEL_RATE_DIV_BY_2;

		} else if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) {

			*k1_div = PIXEL_RATE_DIV_BY_2;

			*k2_div = PIXEL_RATE_DIV_BY_2;

		} else {

			if (odm_combine_factor == 1)

			*k1_div = PIXEL_RATE_DIV_BY_1;

			*k2_div = PIXEL_RATE_DIV_BY_4;

			else if (odm_combine_factor == 2)

			if ((odm_combine_factor == 2) || dc->debug.enable_dp_dig_pixel_rate_div_policy)

				*k2_div = PIXEL_RATE_DIV_BY_2;

		}

	}