Commit 8a6c3e88 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v5.6/ti-sysc-dt-signed' of... 

Merge tag 'omap-for-v5.6/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

dts changes for omaps for ti-sysc driver for v5.6 merge window

Devicetree changes for omaps to configure more devices to probe with
ti-sysc interconnect target module:

- Configure am4 qspi

- Configure aes, des and sham accelerators for am3, 4 and dra7

- Configure iommus for omap4, 5 and dra7

- Add a generic compatible for sdma, and configure omap2 and 3 sdma

* tag 'omap-for-v5.6/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (24 commits)
  ARM: dts: omap5: convert IOMMUs to use ti-sysc
  ARM: dts: omap4: convert IOMMUs to use ti-sysc
  ARM: dts: dra74x: convert IOMMUs to use ti-sysc
  ARM: dts: dra7: convert IOMMUs to use ti-sysc
  ARM: dts: Configure interconnect target module for dra7 des
  ARM: dts: Configure interconnect target module for am4 des
  ARM: dts: Configure interconnect target module for dra7 aes
  ARM: dts: Configure interconnect target module for am4 aes
  ARM: dts: Configure interconnect target module for am3 aes
  ARM: dts: Configure interconnect target module for dra7 sham
  ARM: dts: Configure interconnect target module for am4 sham
  ARM: dts: Configure interconnect target module for am3 sham
  ARM: dts: Configure interconnect target module for am4 qspi
  ARM: dts: Configure interconnect target module for omap3 sdma
  ARM: dts: Configure interconnect target module for omap2 sdma
  ARM: dts: Add generic compatible for omap sdma instances
  bus: ti-sysc: Fix iterating over clocks
  ARM: OMAP2+: Fix ti_sysc_find_one_clockdomain to check for to_clk_hw_omap
  bus: ti-sysc: Fix missing reset delay handling
  ARM: dts: am437x-gp/epos-evm: fix panel compatible
  ...

Link: https://lore.kernel.org/r/pull-1578420398-290837@atomide.com-3


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 3f9c6a6d d71b4823

arch/arm/boot/dts/am335x-sancloud-bbe.dts

+1 −1
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ ethphy0: ethernet-phy@0 { 


&cpsw_emac0 {

	phy-handle = <&ethphy0>;

	phy-mode = "rgmii-txid";

	phy-mode = "rgmii-id";

};



&i2c0 {

arch/arm/boot/dts/am33xx.dtsi

+54 −13
Original line number Diff line number Diff line
@@ -439,19 +439,59 @@ gpmc: gpmc@50000000 { 
			status = "disabled";

		};



		sham: sham@53100000 {

			compatible = "ti,omap4-sham";

		sham_target: target-module@53100000 {

			compatible = "ti,sysc-omap3-sham", "ti,sysc";

			ti,hwmods = "sham";

			reg = <0x53100000 0x200>;

			reg = <0x53100100 0x4>,

			      <0x53100110 0x4>,

			      <0x53100114 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			/* Domains (P, C): per_pwrdm, l3_clkdm */

			clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x53100000 0x1000>;



			sham: sham@0 {

				compatible = "ti,omap4-sham";

				reg = <0 0x200>;

				interrupts = <109>;

				dmas = <&edma 36 0>;

				dma-names = "rx";

			};

		};



		aes: aes@53500000 {

			compatible = "ti,omap4-aes";

		aes_target: target-module@53500000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			ti,hwmods = "aes";

			reg = <0x53500000 0xa0>;

			reg = <0x53500080 0x4>,

			      <0x53500084 0x4>,

			      <0x53500088 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			ti,syss-mask = <1>;

			/* Domains (P, C): per_pwrdm, l3_clkdm */

			clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x53500000 0x1000>;



			aes: aes@0 {

				compatible = "ti,omap4-aes";

				reg = <0 0xa0>;

				interrupts = <103>;

				dmas = <&edma 6 0>,

				       <&edma 5 0>;
@@ -459,6 +499,7 @@ aes: aes@53500000 { 
			};

		};

	};

};



#include "am33xx-l4.dtsi"

#include "am33xx-clocks.dtsi"

arch/arm/boot/dts/am4372.dtsi

+110 −30
Original line number Diff line number Diff line
@@ -256,34 +256,96 @@ mmc3: mmc@0 { 
			};

		};



		sham: sham@53100000 {

			compatible = "ti,omap5-sham";

		sham_target: target-module@53100000 {

			compatible = "ti,sysc-omap3-sham", "ti,sysc";

			ti,hwmods = "sham";

			reg = <0x53100000 0x300>;

			reg = <0x53100100 0x4>,

			      <0x53100110 0x4>,

			      <0x53100114 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			/* Domains (P, C): per_pwrdm, l3_clkdm */

			clocks = <&l3_clkctrl AM4_L3_SHAM_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x53100000 0x1000>;



			sham: sham@0 {

				compatible = "ti,omap5-sham";

				reg = <0 0x300>;

				dmas = <&edma 36 0>;

				dma-names = "rx";

				interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;

			};

		};



		aes: aes@53501000 {

			compatible = "ti,omap4-aes";

		aes_target: target-module@53501000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			ti,hwmods = "aes";

			reg = <0x53501000 0xa0>;

			reg = <0x53501080 0x4>,

			      <0x53501084 0x4>,

			      <0x53501088 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			ti,syss-mask = <1>;

			/* Domains (P, C): per_pwrdm, l3_clkdm */

			clocks = <&l3_clkctrl AM4_L3_AES_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x53501000 0x1000>;



			aes: aes@0 {

				compatible = "ti,omap4-aes";

				reg = <0 0xa0>;

				interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&edma 6 0>,

				      <&edma 5 0>;

				dma-names = "tx", "rx";

			};

		};



		des: des@53701000 {

			compatible = "ti,omap4-des";

		des_target: target-module@53701000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			ti,hwmods = "des";

			reg = <0x53701000 0xa0>;

			reg = <0x53701030 0x4>,

			      <0x53701034 0x4>,

			      <0x53701038 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			ti,syss-mask = <1>;

			/* Domains (P, C): per_pwrdm, l3_clkdm */

			clocks = <&l3_clkctrl AM4_L3_DES_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x53701000 0x1000>;



			des: des@0 {

				compatible = "ti,omap4-des";

				reg = <0 0xa0>;

				interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&edma 34 0>,

				       <&edma 33 0>;

				dma-names = "tx", "rx";

			};

		};



		gpmc: gpmc@50000000 {

			compatible = "ti,am3352-gpmc";
@@ -305,17 +367,35 @@ gpmc: gpmc@50000000 { 
			status = "disabled";

		};



		qspi: spi@47900000 {

		target-module@47900000 {

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "qspi";

			reg = <0x47900000 0x4>,

			      <0x47900010 0x4>;

			reg-names = "rev", "sysc";

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			clocks = <&l3s_clkctrl AM4_L3S_QSPI_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x47900000 0x1000>,

				 <0x30000000 0x30000000 0x4000000>;



			qspi: spi@0 {

				compatible = "ti,am4372-qspi";

			reg = <0x47900000 0x100>,

				reg = <0 0x100>,

				      <0x30000000 0x4000000>;

				reg-names = "qspi_base", "qspi_mmap";

				clocks = <&dpll_per_m2_div4_ck>;

				clock-names = "fck";

				#address-cells = <1>;

				#size-cells = <0>;

			ti,hwmods = "qspi";

				interrupts = <0 138 0x4>;

				num-cs = <4>;

			status = "disabled";

			};

		};



		dss: dss@4832a000 {

arch/arm/boot/dts/am437x-gp-evm.dts

+1 −1
Original line number Diff line number Diff line
@@ -86,7 +86,7 @@ &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */ 
		};



	lcd0: display {

		compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";

		compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";

		label = "lcd";



		backlight = <&lcd_bl>;

arch/arm/boot/dts/am43x-epos-evm.dts

+1 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ vbat: fixedregulator0 { 
	};



	lcd0: display {

		compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";

		compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";

		label = "lcd";



		backlight = <&lcd_bl>;