Commit 8b32076c authored by Sylvia Tsai's avatar Sylvia Tsai Committed by Alex Deucher
Browse files

drm/amd/display: Adding dm controlled signal type in dc_stream 



- Adding dm controlled signal type in dc_stream
- Adding fallback to dvi signal when output signal is hdmi and the connector
  type is not

Signed-off-by: default avatarSylvia Tsai <sylvia.tsai@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: default avatarSylvia Tsai <Sylvia.Tsai@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6e5d1c82

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+15 −15
Original line number Original line Diff line number Diff line
@@ -1237,22 +1237,22 @@ static struct audio *find_first_free_audio(struct resource_context *res_ctx) 




static void update_stream_signal(struct core_stream *stream)

static void update_stream_signal(struct core_stream *stream)

{

{

	if (stream->public.output_signal == SIGNAL_TYPE_NONE) {

		const struct dc_sink *dc_sink = stream->public.sink;

		const struct dc_sink *dc_sink = stream->public.sink;





		if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)

		if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)

		stream->signal = stream->sink->link->public.connector_signal;

			stream->signal =

	else if (dc_sink->sink_signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

					stream->sink->link->

			dc_sink->sink_signal == SIGNAL_TYPE_DVI_DUAL_LINK)

					public.connector_signal;

		/* For asic supports dual link DVI, we should adjust signal type

		 * based on timing pixel clock. If pixel clock more than 165Mhz,

		 * signal is dual link, otherwise, single link.

		 */

		if (stream->public.timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ)

			stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;

		else

			stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;

		else

		else

			stream->signal = dc_sink->sink_signal;

			stream->signal = dc_sink->sink_signal;

	} else {

		stream->signal = stream->public.output_signal;

	}



	if (stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK &&

		stream->public.timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ)

		stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;

}

}





bool resource_is_stream_unchanged(

bool resource_is_stream_unchanged(

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -411,6 +411,7 @@ enum surface_update_type { 
struct dc_stream {

struct dc_stream {

	const struct dc_sink *sink;

	const struct dc_sink *sink;

	struct dc_crtc_timing timing;

	struct dc_crtc_timing timing;

	enum signal_type output_signal;





	enum dc_color_space output_color_space;

	enum dc_color_space output_color_space;