Commit 8b3ed19c authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Populate bxt/glk DPLL clock limits a bit more 



Set the bxt/glk DPLL min dotclock to 25MHz (HDMI minimum)
and the max to 594 MHz (HDMI max). The supported DP frequencies
(162MHz-540MHz) fit within the same range.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220307233940.4161-8-ville.syrjala@linux.intel.com


Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 3917f484

drivers/gpu/drm/i915/display/intel_dpll.c

+1 −2
Original line number Diff line number Diff line
@@ -285,8 +285,7 @@ static const struct intel_limit intel_limits_chv = { 
};



static const struct intel_limit intel_limits_bxt = {

	/* FIXME: find real dot limits */

	.dot = { .min = 0, .max = INT_MAX },

	.dot = { .min = 25000, .max = 594000 },

	.vco = { .min = 4800000, .max = 6700000 },

	.n = { .min = 1, .max = 1 },

	.m1 = { .min = 2, .max = 2 },