Commit 8b7a2e00 authored by Michael Walle's avatar Michael Walle Committed by Tudor Ambarus
Browse files

mtd: spi-nor: xilinx: rename vendor specific functions and defines 



Drop the generic spi_nor prefix for all the xilinx functions.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: default avatarPratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-23-michael@walle.cc
parent 8b4195cd

drivers/mtd/spi-nor/xilinx.c

+15 −15
Original line number Diff line number Diff line
@@ -8,9 +8,9 @@ 


#include "core.h"



#define SPINOR_OP_XSE		0x50	/* Sector erase */

#define SPINOR_OP_XPP		0x82	/* Page program */

#define SPINOR_OP_XRDSR		0xd7	/* Read status register */

#define XILINX_OP_SE		0x50	/* Sector erase */

#define XILINX_OP_PP		0x82	/* Page program */

#define XILINX_OP_RDSR		0xd7	/* Read status register */



#define XSR_PAGESIZE		BIT(0)	/* Page size in Po2 or Linear */

#define XSR_RDY			BIT(7)	/* Ready */
@@ -60,20 +60,20 @@ static u32 s3an_nor_convert_addr(struct spi_nor *nor, u32 addr) 
}



/**

 * spi_nor_xread_sr() - Read the Status Register on S3AN flashes.

 * xilinx_nor_read_sr() - Read the Status Register on S3AN flashes.

 * @nor:	pointer to 'struct spi_nor'.

 * @sr:		pointer to a DMA-able buffer where the value of the

 *              Status Register will be written.

 *

 * Return: 0 on success, -errno otherwise.

 */

static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)

static int xilinx_nor_read_sr(struct spi_nor *nor, u8 *sr)

{

	int ret;



	if (nor->spimem) {

		struct spi_mem_op op =

			SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0),

			SPI_MEM_OP(SPI_MEM_OP_CMD(XILINX_OP_RDSR, 0),

				   SPI_MEM_OP_NO_ADDR,

				   SPI_MEM_OP_NO_DUMMY,

				   SPI_MEM_OP_DATA_IN(1, sr, 0));
@@ -82,7 +82,7 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) 


		ret = spi_mem_exec_op(nor->spimem, &op);

	} else {

		ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr,

		ret = spi_nor_controller_ops_read_reg(nor, XILINX_OP_RDSR, sr,

						      1);

	}
@@ -93,17 +93,17 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) 
}



/**

 * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to see if

 * the flash is ready for new commands.

 * xilinx_nor_sr_ready() - Query the Status Register of the S3AN flash to see

 * if the flash is ready for new commands.

 * @nor:	pointer to 'struct spi_nor'.

 *

 * Return: 1 if ready, 0 if not ready, -errno on errors.

 */

static int spi_nor_xsr_ready(struct spi_nor *nor)

static int xilinx_nor_sr_ready(struct spi_nor *nor)

{

	int ret;



	ret = spi_nor_xread_sr(nor, nor->bouncebuf);

	ret = xilinx_nor_read_sr(nor, nor->bouncebuf);

	if (ret)

		return ret;
@@ -116,12 +116,12 @@ static int xilinx_nor_setup(struct spi_nor *nor, 
	u32 page_size;

	int ret;



	ret = spi_nor_xread_sr(nor, nor->bouncebuf);

	ret = xilinx_nor_read_sr(nor, nor->bouncebuf);

	if (ret)

		return ret;



	nor->erase_opcode = SPINOR_OP_XSE;

	nor->program_opcode = SPINOR_OP_XPP;

	nor->erase_opcode = XILINX_OP_SE;

	nor->program_opcode = XILINX_OP_PP;

	nor->read_opcode = SPINOR_OP_READ;

	nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
@@ -155,7 +155,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, 
static void xilinx_nor_late_init(struct spi_nor *nor)

{

	nor->params->setup = xilinx_nor_setup;

	nor->params->ready = spi_nor_xsr_ready;

	nor->params->ready = xilinx_nor_sr_ready;

}



static const struct spi_nor_fixups xilinx_nor_fixups = {