Commit 8bd2d6e1 authored by Shazad Hussain's avatar Shazad Hussain Committed by Vinod Koul
Browse files

phy: qcom-qmp: Add SA8775P USB3 UNI phy 



The SA8775P platform has 5nm USB3 UNI phy attached to the USB0 and USB1
controllers.

Add QMP PHY config, pcs entries and support for the new compatible for
SA8775P platform.

Signed-off-by: default avatarShazad Hussain <quic_shazhuss@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230428130824.23803-5-quic_shazhuss@quicinc.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent bfd73c85

drivers/phy/qualcomm/phy-qcom-qmp-usb.c

+45 −0
Original line number Diff line number Diff line
@@ -1408,6 +1408,26 @@ static const struct qmp_phy_init_tbl sc8280xp_usb3_uniphy_pcs_tbl[] = { 
	QMP_PHY_INIT_CFG(QPHY_V5_PCS_REFGEN_REQ_CONFIG1, 0x21),

};



static const struct qmp_phy_init_tbl sa8775p_usb3_uniphy_pcs_tbl[] = {

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG1, 0xc4),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG2, 0x89),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG3, 0x20),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG6, 0x13),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_RX_SIGDET_LVL, 0xaa),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCS_TX_RX_CONFIG, 0x0c),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_POWER_STATE_CONFIG1, 0x6f),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_CDR_RESET_TIME, 0x0a),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_ALIGN_DETECT_CONFIG1, 0x88),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_ALIGN_DETECT_CONFIG2, 0x13),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_EQ_CONFIG1, 0x4b),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_EQ_CONFIG5, 0x10),

	QMP_PHY_INIT_CFG(QPHY_V5_PCS_REFGEN_REQ_CONFIG1, 0x21),

};



struct qmp_usb_offsets {

	u16 serdes;

	u16 pcs;
@@ -1629,6 +1649,28 @@ static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = { 
	.has_phy_dp_com_ctrl	= true,

};



static const struct qmp_phy_cfg sa8775p_usb3_uniphy_cfg = {

	.lanes			= 1,



	.offsets		= &qmp_usb_offsets_v5,



	.serdes_tbl		= sc8280xp_usb3_uniphy_serdes_tbl,

	.serdes_tbl_num		= ARRAY_SIZE(sc8280xp_usb3_uniphy_serdes_tbl),

	.tx_tbl			= sc8280xp_usb3_uniphy_tx_tbl,

	.tx_tbl_num		= ARRAY_SIZE(sc8280xp_usb3_uniphy_tx_tbl),

	.rx_tbl			= sc8280xp_usb3_uniphy_rx_tbl,

	.rx_tbl_num		= ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl),

	.pcs_tbl		= sa8775p_usb3_uniphy_pcs_tbl,

	.pcs_tbl_num		= ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl),

	.clk_list		= qmp_v4_phy_clk_l,

	.num_clks		= ARRAY_SIZE(qmp_v4_phy_clk_l),

	.reset_list		= qcm2290_usb3phy_reset_l,

	.num_resets		= ARRAY_SIZE(qcm2290_usb3phy_reset_l),

	.vreg_list		= qmp_phy_vreg_l,

	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= qmp_v5_usb3phy_regs_layout,

};



static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {

	.lanes			= 2,
@@ -2597,6 +2639,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = { 
	}, {

		.compatible = "qcom,qcm2290-qmp-usb3-phy",

		.data = &qcm2290_usb3phy_cfg,

	}, {

		.compatible = "qcom,sa8775p-qmp-usb3-uni-phy",

		.data = &sa8775p_usb3_uniphy_cfg,

	}, {

		.compatible = "qcom,sc7180-qmp-usb3-phy",

		.data = &sc7180_usb3phy_cfg,