Unverified Commit 8be4ee0e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-dts-for-v6.6-tag1' of... 

Merge tag 'renesas-dts-for-v6.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.6

  - Add Clocked Serial Interface (CSI) support for the RZ/V2M SoC,
  - Add PMIC, RTC, and PWM support for the RZ/G2L, RZ/G2LC, and RZ/V2L
    SMARC EVK development boards,
  - Add PWM (MTU3a) support for the RZ/G2UL and RZ/Five SoCs,
  - Add External interrupt (INTC-EX) support for the R-Car S4-8 SoC,
  - Add LED support for the Spider development board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: spider-cpu: Add GP LEDs
  arm64: dts: renesas: r8a779f0: Add INTC-EX node
  arm64: dts: renesas: rzg2ul-smarc: Add support for enabling MTU3
  arm64: dts: renesas: r9a07g043: Add MTU3a node
  ARM dts: renesas: armadillo800eva: Switch to enable-gpios
  arm64: dts: renesas: rzg2lc-smarc-som: Enable PMIC and built-in RTC
  arm64: dts: renesas: rzg2lc-smarc-som: Add PHY interrupt support for ETH0
  riscv: dts: renesas: Clean up dtbs_check W=1 warning due to empty phy node
  arm64: dts: renesas: rzg2lc-smarc: Add support for enabling MTU3
  arm64: dts: renesas: rzg2l-smarc: Add support for enabling MTU3
  arm64: dts: renesas: Add missing space before {
  ARM: dts: renesas: Add missing space before {
  arm64: dts: renesas: Minor whitespace cleanup around '='
  arm64: dts: renesas: rzg2l-smarc-som: Enable PMIC and built-in RTC
  arm64: dts: renesas: r9a09g011: Add CSI nodes
  arm64: dts: renesas: rzg2l: Fix txdv-skew-psec typos
  arm64: dts: renesas: rzg2l: Update overfow/underflow IRQ names for MTU3 channels

Link: https://lore.kernel.org/r/cover.1690545144.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d64f1404 406b5af4

arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts

+1 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ vccq_sdhi0: regulator-vccq-sdhi0 { 
		regulator-max-microvolt = <3300000>;

		vin-supply = <&vcc_sdhi0>;



		enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>;

		enable-gpios = <&pfc 74 GPIO_ACTIVE_HIGH>;

		gpios = <&pfc 17 GPIO_ACTIVE_HIGH>;

		states = <3300000 0>, <1800000 1>;

arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -6,6 +6,8 @@ 
 */



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/leds/common.h>



#include "r8a779f0.dtsi"



/ {
@@ -22,6 +24,24 @@ chosen { 
		stdout-path = "serial0:1843200n8";

	};



	leds {

		compatible = "gpio-leds";



		led-7 {

			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_INDICATOR;

			function-enumerator = <7>;

		};



		led-8 {

			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_INDICATOR;

			function-enumerator = <8>;

		};

	};



	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */

arch/arm64/boot/dts/renesas/r8a779f0.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -466,6 +466,21 @@ tsc: thermal@e6198000 { 
			#thermal-sensor-cells = <1>;

		};



		intc_ex: interrupt-controller@e61c0000 {

			compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc";

			#interrupt-cells = <2>;

			interrupt-controller;

			reg = <0 0xe61c0000 0 0x200>;

			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>;

			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;

		};



		tmu0: timer@e61e0000 {

			compatible = "renesas,tmu-r8a779f0", "renesas,tmu";

			reg = <0 0xe61e0000 0 0x30>;

arch/arm64/boot/dts/renesas/r9a07g043.dtsi

+70 −0
Original line number Diff line number Diff line
@@ -74,6 +74,76 @@ soc: soc { 
		#size-cells = <2>;

		ranges;



		mtu3: timer@10001200 {

			compatible = "renesas,r9a07g043-mtu3",

				     "renesas,rz-mtu3";

			reg = <0 0x10001200 0 0xb00>;

			interrupts = <SOC_PERIPHERAL_IRQ(170) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(171) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(172) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(173) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(174) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(175) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(176) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(177) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(178) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(179) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(180) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(181) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(182) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(183) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(184) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(185) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(186) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(187) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(188) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(189) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(190) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(191) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(192) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(193) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(194) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(195) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(196) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(197) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(198) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(199) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(200) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(201) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(202) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(203) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(204) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(205) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(206) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(207) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(208) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(209) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(210) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(211) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(212) IRQ_TYPE_EDGE_RISING>,

				     <SOC_PERIPHERAL_IRQ(213) IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",

					  "tciv0", "tgie0", "tgif0",

					  "tgia1", "tgib1", "tciv1", "tciu1",

					  "tgia2", "tgib2", "tciv2", "tciu2",

					  "tgia3", "tgib3", "tgic3", "tgid3",

					  "tciv3",

					  "tgia4", "tgib4", "tgic4", "tgid4",

					  "tciv4",

					  "tgiu5", "tgiv5", "tgiw5",

					  "tgia6", "tgib6", "tgic6", "tgid6",

					  "tciv6",

					  "tgia7", "tgib7", "tgic7", "tgid7",

					  "tciv7",

					  "tgia8", "tgib8", "tgic8", "tgid8",

					  "tciv8", "tciu8";

			clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>;

			power-domains = <&cpg>;

			resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		ssi0: ssi@10049c00 {

			compatible = "renesas,r9a07g043-ssi",

				     "renesas,rz-ssi";

arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts

+11 −0
Original line number Diff line number Diff line
@@ -17,6 +17,17 @@ 
#define SW_SW0_DEV_SEL	1

#define SW_ET0_EN_N	1



/*

 * To enable MTU3a PWM on PMOD0,

 *  - Set DIP-Switch SW1-3 to On position.

 *  - Set PMOD_MTU3 macro to 1.

 */

#define PMOD_MTU3	0



#if (PMOD_MTU3 && !SW_ET0_EN_N)

#error "Cannot set as both PMOD_MTU3 and !SW_ET0_EN_N are mutually exclusive"

#endif



#include "r9a07g043u.dtsi"

#include "rzg2ul-smarc-som.dtsi"

#include "rzg2ul-smarc.dtsi"