Commit 8c41b3d7 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 main board support

parent faf1ce7f
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb \
			       r8a774a1-hihope-rzg2m-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2.dtb
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// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 main board
 *
 * Copyright (C) 2020 Renesas Electronics Corp.
 */

/dts-v1/;
#include "r8a774a1.dtsi"
#include "hihope-rev4.dtsi"

/ {
	model = "HopeRun HiHope RZ/G2M main board based on r8a774a1";
	compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x78000000>;
	};

	memory@600000000 {
		device_type = "memory";
		reg = <0x6 0x00000000 0x0 0x80000000>;
	};
};

&du {
	clocks = <&cpg CPG_MOD 724>,
		 <&cpg CPG_MOD 723>,
		 <&cpg CPG_MOD 722>,
		 <&versaclock5 1>,
		 <&x302_clk>,
		 <&versaclock5 2>;
	clock-names = "du.0", "du.1", "du.2",
		      "dclkin.0", "dclkin.1", "dclkin.2";
};
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@@ -10,6 +10,8 @@
#include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
#include <dt-bindings/power/r8a774a1-sysc.h>

#define CPG_AUDIO_CLK_I		R8A774A1_CLK_S0D4

/ {
	compatible = "renesas,r8a774a1";
	#address-cells = <2>;