Commit 8cce5702 authored by Samuel Holland's avatar Samuel Holland Committed by Jernej Skrabec
Browse files

ARM: dts: sunxi: Use constants for RTC clock indexes 



The binding header provides descriptive names for the RTC clock indexes,
since the indexes were arbitrarily chosen by the binding, not by the
hardware. Let's use the names, so the meaning is clearer.

Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Acked-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220607012438.18183-1-samuel@sholland.org
parent 4f05f03e

arch/arm/boot/dts/sun6i-a31.dtsi

+7 −5
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ 
#include <dt-bindings/thermal/thermal.h>



#include <dt-bindings/clock/sun6i-a31-ccu.h>

#include <dt-bindings/clock/sun6i-rtc.h>

#include <dt-bindings/reset/sun6i-a31-ccu.h>



/ {
@@ -598,7 +599,7 @@ ohci2: usb@1c1c400 { 
		ccu: clock@1c20000 {

			compatible = "allwinner,sun6i-a31-ccu";

			reg = <0x01c20000 0x400>;

			clocks = <&osc24M>, <&rtc 0>;

			clocks = <&osc24M>, <&rtc CLK_OSC32K>;

			clock-names = "hosc", "losc";

			#clock-cells = <1>;

			#reset-cells = <1>;
@@ -612,7 +613,8 @@ pio: pinctrl@1c20800 { 
				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;

			clocks = <&ccu CLK_APB1_PIO>, <&osc24M>,

				 <&rtc CLK_OSC32K>;

			clock-names = "apb", "hosc", "losc";

			gpio-controller;

			interrupt-controller;
@@ -1319,7 +1321,7 @@ prcm@1f01400 { 
			ar100: ar100_clk {

				compatible = "allwinner,sun6i-a31-ar100-clk";

				#clock-cells = <0>;

				clocks = <&rtc 0>, <&osc24M>,

				clocks = <&rtc CLK_OSC32K>, <&osc24M>,

					 <&ccu CLK_PLL_PERIPH>,

					 <&ccu CLK_PLL_PERIPH>;

				clock-output-names = "ar100";
@@ -1354,7 +1356,7 @@ apb0_gates: apb0_gates_clk { 
			ir_clk: ir_clk {

				#clock-cells = <0>;

				compatible = "allwinner,sun4i-a10-mod0-clk";

				clocks = <&rtc 0>, <&osc24M>;

				clocks = <&rtc CLK_OSC32K>, <&osc24M>;

				clock-output-names = "ir";

			};
@@ -1385,7 +1387,7 @@ r_pio: pinctrl@1f02c00 { 
			interrupt-parent = <&r_intc>;

			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>;

			clock-names = "apb", "hosc", "losc";

			resets = <&apb0_rst 0>;

			gpio-controller;

arch/arm/boot/dts/sun8i-a23-a33.dtsi

+5 −3
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 


#include <dt-bindings/interrupt-controller/arm-gic.h>



#include <dt-bindings/clock/sun6i-rtc.h>

#include <dt-bindings/clock/sun8i-a23-a33-ccu.h>

#include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
@@ -329,7 +330,7 @@ ohci0: usb@1c1a400 { 


		ccu: clock@1c20000 {

			reg = <0x01c20000 0x400>;

			clocks = <&osc24M>, <&rtc 0>;

			clocks = <&osc24M>, <&rtc CLK_OSC32K>;

			clock-names = "hosc", "losc";

			#clock-cells = <1>;

			#reset-cells = <1>;
@@ -340,7 +341,8 @@ pio: pinctrl@1c20800 { 
			reg = <0x01c20800 0x400>;

			interrupt-parent = <&r_intc>;

			/* interrupts get set in SoC specific dtsi file */

			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;

			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,

				 <&rtc CLK_OSC32K>;

			clock-names = "apb", "hosc", "losc";

			gpio-controller;

			interrupt-controller;
@@ -810,7 +812,7 @@ r_pio: pinctrl@1f02c00 { 
			reg = <0x01f02c00 0x400>;

			interrupt-parent = <&r_intc>;

			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>;

			clock-names = "apb", "hosc", "losc";

			resets = <&apb0_rst 0>;

			gpio-controller;

arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts

+2 −2
Original line number Diff line number Diff line
@@ -106,7 +106,7 @@ poweroff { 
	wifi_pwrseq: wifi_pwrseq {

		compatible = "mmc-pwrseq-simple";

		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */

		clocks = <&rtc 1>;

		clocks = <&rtc CLK_OSC32K_FANOUT>;

		clock-names = "ext_clock";

	};

};
@@ -181,7 +181,7 @@ &uart1 { 
	bluetooth {

		compatible = "brcm,bcm43438-bt";

		max-speed = <1500000>;

		clocks = <&rtc 1>;

		clocks = <&rtc CLK_OSC32K_FANOUT>;

		clock-names = "lpo";

		vbat-supply = <&reg_vcc3v3>;

		vddio-supply = <&reg_vcc3v3>;

arch/arm/boot/dts/sun8i-h3-beelink-x2.dts

+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ spdif_out: spdif-out { 
	wifi_pwrseq: wifi_pwrseq {

		compatible = "mmc-pwrseq-simple";

		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */

		clocks = <&rtc 1>;

		clocks = <&rtc CLK_OSC32K_FANOUT>;

		clock-names = "ext_clock";

	};

};

arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts

+2 −2
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ reg_vdd_sys: vdd-sys { 
	wifi_pwrseq: wifi_pwrseq {

		compatible = "mmc-pwrseq-simple";

		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */

		clocks = <&rtc 1>;

		clocks = <&rtc CLK_OSC32K_FANOUT>;

		clock-names = "ext_clock";

	};
@@ -151,7 +151,7 @@ &uart2 { 


	bluetooth {

		compatible = "brcm,bcm43438-bt";

		clocks = <&rtc 1>;

		clocks = <&rtc CLK_OSC32K_FANOUT>;

		clock-names = "lpo";

		vbat-supply = <&reg_vcc3v3>;

		vddio-supply = <&reg_vcc3v3>;