Loading Documentation/devicetree/bindings/display/msm/gpu.txt +12 −26 Original line number Diff line number Diff line Qualcomm adreno/snapdragon GPU Required properties: - compatible: "qcom,adreno-3xx" - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" for example: "qcom,adreno-306.0", "qcom,adreno" Note that you need to list the less specific "qcom,adreno" (since this is what the device is matched on), in addition to the more specific with the chip-id. - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt signal from the gpu. - clocks: device clocks See ../clocks/clock-bindings.txt for details. - clock-names: the following clocks are required: * "core_clk" * "iface_clk" * "mem_iface_clk" - qcom,chipid: gpu chip-id. Note this may become optional for future devices if we can reliably read the chipid from hw - qcom,gpu-pwrlevels: list of operating points - compatible: "qcom,gpu-pwrlevels" - for each qcom,gpu-pwrlevel: - qcom,gpu-freq: requested gpu clock speed - NOTE: downstream android driver defines additional parameters to configure memory bandwidth scaling per OPP. * "core" * "iface" * "mem_iface" Example: Loading @@ -25,28 +21,18 @@ Example: ... gpu: qcom,kgsl-3d0@4300000 { compatible = "qcom,adreno-3xx"; compatible = "qcom,adreno-320.2", "qcom,adreno"; reg = <0x04300000 0x20000>; reg-names = "kgsl_3d0_reg_memory"; interrupts = <GIC_SPI 80 0>; interrupt-names = "kgsl_3d0_irq"; clock-names = "core_clk", "iface_clk", "mem_iface_clk"; "core", "iface", "mem_iface"; clocks = <&mmcc GFX3D_CLK>, <&mmcc GFX3D_AHB_CLK>, <&mmcc MMSS_IMEM_AHB_CLK>; qcom,chipid = <0x03020100>; qcom,gpu-pwrlevels { compatible = "qcom,gpu-pwrlevels"; qcom,gpu-pwrlevel@0 { qcom,gpu-freq = <450000000>; }; qcom,gpu-pwrlevel@1 { qcom,gpu-freq = <27000000>; }; }; }; }; Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt 0 → 100644 +27 −0 Original line number Diff line number Diff line Multi-Inno MI0283QT display panel Required properties: - compatible: "multi-inno,mi0283qt". The node for this driver must be a child node of a SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional properties: - dc-gpios: D/C pin. The presence/absence of this GPIO determines the panel interface mode (IM[3:0] pins): - present: IM=x110 4-wire 8-bit data serial interface - absent: IM=x101 3-wire 9-bit data serial interface - reset-gpios: Reset pin - power-supply: A regulator node for the supply voltage. - backlight: phandle of the backlight device attached to the panel - rotation: panel rotation in degrees counter clockwise (0,90,180,270) Example: mi0283qt@0{ compatible = "multi-inno,mi0283qt"; reg = <0>; spi-max-frequency = <32000000>; rotation = <90>; dc-gpios = <&gpio 25 0>; backlight = <&backlight>; }; Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt 0 → 100644 +7 −0 Original line number Diff line number Diff line BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel Required properties: - compatible: should be "boe,nv101wxmn51" This binding is compatible with the simple-panel binding, which is specified in simple-panel.txt in this directory. Documentation/devicetree/bindings/display/panel/netron-dy,e231732.txt 0 → 100644 +7 −0 Original line number Diff line number Diff line Netron-DY E231732 7.0" WSVGA TFT LCD panel Required properties: - compatible: should be "netron-dy,e231732" This binding is compatible with the simple-panel binding, which is specified in simple-panel.txt in this directory. Documentation/devicetree/bindings/display/panel/panel.txt 0 → 100644 +4 −0 Original line number Diff line number Diff line Common display properties ------------------------- - rotation: Display rotation in degrees counter clockwise (0,90,180,270) Loading
Documentation/devicetree/bindings/display/msm/gpu.txt +12 −26 Original line number Diff line number Diff line Qualcomm adreno/snapdragon GPU Required properties: - compatible: "qcom,adreno-3xx" - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" for example: "qcom,adreno-306.0", "qcom,adreno" Note that you need to list the less specific "qcom,adreno" (since this is what the device is matched on), in addition to the more specific with the chip-id. - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt signal from the gpu. - clocks: device clocks See ../clocks/clock-bindings.txt for details. - clock-names: the following clocks are required: * "core_clk" * "iface_clk" * "mem_iface_clk" - qcom,chipid: gpu chip-id. Note this may become optional for future devices if we can reliably read the chipid from hw - qcom,gpu-pwrlevels: list of operating points - compatible: "qcom,gpu-pwrlevels" - for each qcom,gpu-pwrlevel: - qcom,gpu-freq: requested gpu clock speed - NOTE: downstream android driver defines additional parameters to configure memory bandwidth scaling per OPP. * "core" * "iface" * "mem_iface" Example: Loading @@ -25,28 +21,18 @@ Example: ... gpu: qcom,kgsl-3d0@4300000 { compatible = "qcom,adreno-3xx"; compatible = "qcom,adreno-320.2", "qcom,adreno"; reg = <0x04300000 0x20000>; reg-names = "kgsl_3d0_reg_memory"; interrupts = <GIC_SPI 80 0>; interrupt-names = "kgsl_3d0_irq"; clock-names = "core_clk", "iface_clk", "mem_iface_clk"; "core", "iface", "mem_iface"; clocks = <&mmcc GFX3D_CLK>, <&mmcc GFX3D_AHB_CLK>, <&mmcc MMSS_IMEM_AHB_CLK>; qcom,chipid = <0x03020100>; qcom,gpu-pwrlevels { compatible = "qcom,gpu-pwrlevels"; qcom,gpu-pwrlevel@0 { qcom,gpu-freq = <450000000>; }; qcom,gpu-pwrlevel@1 { qcom,gpu-freq = <27000000>; }; }; }; };
Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt 0 → 100644 +27 −0 Original line number Diff line number Diff line Multi-Inno MI0283QT display panel Required properties: - compatible: "multi-inno,mi0283qt". The node for this driver must be a child node of a SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional properties: - dc-gpios: D/C pin. The presence/absence of this GPIO determines the panel interface mode (IM[3:0] pins): - present: IM=x110 4-wire 8-bit data serial interface - absent: IM=x101 3-wire 9-bit data serial interface - reset-gpios: Reset pin - power-supply: A regulator node for the supply voltage. - backlight: phandle of the backlight device attached to the panel - rotation: panel rotation in degrees counter clockwise (0,90,180,270) Example: mi0283qt@0{ compatible = "multi-inno,mi0283qt"; reg = <0>; spi-max-frequency = <32000000>; rotation = <90>; dc-gpios = <&gpio 25 0>; backlight = <&backlight>; };
Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt 0 → 100644 +7 −0 Original line number Diff line number Diff line BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel Required properties: - compatible: should be "boe,nv101wxmn51" This binding is compatible with the simple-panel binding, which is specified in simple-panel.txt in this directory.
Documentation/devicetree/bindings/display/panel/netron-dy,e231732.txt 0 → 100644 +7 −0 Original line number Diff line number Diff line Netron-DY E231732 7.0" WSVGA TFT LCD panel Required properties: - compatible: should be "netron-dy,e231732" This binding is compatible with the simple-panel binding, which is specified in simple-panel.txt in this directory.
Documentation/devicetree/bindings/display/panel/panel.txt 0 → 100644 +4 −0 Original line number Diff line number Diff line Common display properties ------------------------- - rotation: Display rotation in degrees counter clockwise (0,90,180,270)