Commit 8eb5287e authored by Luca Weiss's avatar Luca Weiss Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm6350: Add CDSP nodes 



Add the required nodes for booting the CDSP on sm6350.

Signed-off-by: default avatarLuca Weiss <luca.weiss@fairphone.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-8-luca.weiss@fairphone.com
parent efc33c96

arch/arm64/boot/dts/qcom/sm6350.dtsi

+122 −0
Original line number Diff line number Diff line
@@ -385,6 +385,30 @@ smp2p_adsp_in: slave-kernel { 
		};

	};



	smp2p-cdsp {

		compatible = "qcom,smp2p";

		qcom,smem = <94>, <432>;

		interrupts-extended = <&ipcc IPCC_CLIENT_CDSP

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_CDSP

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <5>;



		smp2p_cdsp_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		smp2p_cdsp_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-mpss {

		compatible = "qcom,smp2p";

		qcom,smem = <435>, <428>;
@@ -630,6 +654,104 @@ IPCC_MPROC_SIGNAL_GLINK_QMP 
			};

		};



		cdsp: remoteproc@8300000 {

			compatible = "qcom,sm6350-cdsp-pas";

			reg = <0 0x08300000 0 0x10000>;



			interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,

					      <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "xo";



			power-domains = <&rpmhpd SM6350_CX>,

					<&rpmhpd SM6350_MX>;

			power-domain-names = "cx", "mx";



			memory-region = <&pil_cdsp_mem>;



			qcom,qmp = <&aoss_qmp>;



			qcom,smem-states = <&smp2p_cdsp_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts-extended = <&ipcc IPCC_CLIENT_CDSP

							     IPCC_MPROC_SIGNAL_GLINK_QMP

							     IRQ_TYPE_EDGE_RISING>;

				mboxes = <&ipcc IPCC_CLIENT_CDSP

						IPCC_MPROC_SIGNAL_GLINK_QMP>;



				label = "cdsp";

				qcom,remote-pid = <5>;



				fastrpc {

					compatible = "qcom,fastrpc";

					qcom,glink-channels = "fastrpcglink-apps-dsp";

					label = "cdsp";

					#address-cells = <1>;

					#size-cells = <0>;



					compute-cb@1 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <1>;

						iommus = <&apps_smmu 0x1401 0x20>;

					};



					compute-cb@2 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <2>;

						iommus = <&apps_smmu 0x1402 0x20>;

					};



					compute-cb@3 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <3>;

						iommus = <&apps_smmu 0x1403 0x20>;

					};



					compute-cb@4 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <4>;

						iommus = <&apps_smmu 0x1404 0x20>;

					};



					compute-cb@5 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <5>;

						iommus = <&apps_smmu 0x1405 0x20>;

					};



					compute-cb@6 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <6>;

						iommus = <&apps_smmu 0x1406 0x20>;

					};



					compute-cb@7 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <7>;

						iommus = <&apps_smmu 0x1407 0x20>;

					};



					compute-cb@8 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <8>;

						iommus = <&apps_smmu 0x1408 0x20>;

					};



					/* note: secure cb9 in downstream */

				};

			};

		};



		sdhc_2: sdhci@8804000 {

			compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5";

			reg = <0 0x08804000 0 0x1000>;