Commit 8fe2a9c5 authored Nov 30, 2022 by James Morse Committed by Will Deacon Dec 01, 2022

arm64/sysreg: Convert ID_MMFR3_EL1 to automatic generation



Convert ID_MMFR3_EL1 to be automatically generated as per DDI0487I.a,
no functional changes.

Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20221130171637.718182-21-james.morse@arm.com


Signed-off-by: Will Deacon <will@kernel.org>

parent fbfba88b

arch/arm64/include/asm/sysreg.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -171,7 +171,6 @@
		#define SYS_ID_DFR0_EL1 sys_reg(3, 0, 0, 1, 2)
		#define SYS_ID_DFR1_EL1 sys_reg(3, 0, 0, 3, 5)
		#define SYS_ID_AFR0_EL1 sys_reg(3, 0, 0, 1, 3)
		#define SYS_ID_MMFR3_EL1 sys_reg(3, 0, 0, 1, 7)
		#define SYS_ID_MMFR4_EL1 sys_reg(3, 0, 0, 2, 6)
		#define SYS_ID_MMFR5_EL1 sys_reg(3, 0, 0, 3, 6)

arch/arm64/tools/sysreg

+40 −0

Original line number	Diff line number	Diff line
		@@ -183,6 +183,46 @@ Enum 3:0 L1HvdFG
		EndEnum
		EndSysreg

		Sysreg ID_MMFR3_EL1 3 0 0 1 7
		Res0 63:32
		Enum 31:28 Supersec
		0b0000 IMP
		0b1111 NI
		EndEnum
		Enum 27:24 CMemSz
		0b0000 4GB
		0b0001 64GB
		0b0010 1TB
		EndEnum
		Enum 23:20 CohWalk
		0b0000 NI
		0b0001 IMP
		EndEnum
		Enum 19:16 PAN
		0b0000 NI
		0b0001 PAN
		0b0010 PAN2
		EndEnum
		Enum 15:12 MaintBcst
		0b0000 NI
		0b0001 NO_TLB
		0b0010 ALL
		EndEnum
		Enum 11:8 BPMaint
		0b0000 NI
		0b0001 ALL
		0b0010 BY_VA
		EndEnum
		Enum 7:4 CMaintSW
		0b0000 NI
		0b0001 IMP
		EndEnum
		Enum 3:0 CMaintVA
		0b0000 NI
		0b0001 IMP
		EndEnum
		EndSysreg

		Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
		Enum 63:60 CSV3
		0b0000 NI