Unverified Commit 92f3bfac authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-riscv-soc-for-v6.2-tag1' of... 

Merge tag 'renesas-riscv-soc-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc

Renesas RISC-V SoC updates for v6.2

  - Add Kconfig option for Renesas RISC-V SoCs.

* tag 'renesas-riscv-soc-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option

Link: https://lore.kernel.org/r/cover.1668788933.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 54721ff7 8292493c

arch/riscv/Kconfig.socs

+5 −0
Original line number Original line Diff line number Diff line
@@ -7,6 +7,11 @@ config SOC_MICROCHIP_POLARFIRE 
	help

	help

	  This enables support for Microchip PolarFire SoC platforms.

	  This enables support for Microchip PolarFire SoC platforms.





config ARCH_RENESAS

	bool "Renesas RISC-V SoCs"

	help

	  This enables support for the RISC-V based Renesas SoCs.



config SOC_SIFIVE

config SOC_SIFIVE

	bool "SiFive SoCs"

	bool "SiFive SoCs"

	select SERIAL_SIFIVE if TTY

	select SERIAL_SIFIVE if TTY