Commit 93dd6440 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman
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coresight: etm4x: Fix accesses to TRCVMIDCTLR1 



TRCVMIDCTRL1 is only implemented only if the TRCIDR4.NUMVMIDC > 4.
We must not touch the register otherwise.

Cc: stable@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20201127175256.1092685-4-mathieu.poirier@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3ac1e006

drivers/hwtracing/coresight/coresight-etm4x-core.c

+6 −3
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) 
		writeq_relaxed(config->vmid_val[i],

			       drvdata->base + TRCVMIDCVRn(i));

	writel_relaxed(config->vmid_mask0, drvdata->base + TRCVMIDCCTLR0);

	if (drvdata->numvmidc > 4)

		writel_relaxed(config->vmid_mask1, drvdata->base + TRCVMIDCCTLR1);



	if (!drvdata->skip_power_up) {
@@ -1243,6 +1244,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) 
	state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1);



	state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0);

	if (drvdata->numvmidc > 4)

		state->trcvmidcctlr1 = readl(drvdata->base + TRCVMIDCCTLR1);



	state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR);
@@ -1353,6 +1355,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) 
	writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1);



	writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR0);

	if (drvdata->numvmidc > 4)

		writel_relaxed(state->trcvmidcctlr1, drvdata->base + TRCVMIDCCTLR1);



	writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET);