Commit 945cb3a1 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Stephen Boyd
Browse files

clk: qcom: gpucc-sm8150: Add SC8180x support 



The GPU clock controller found in SC8180x is a variant of the same block
found in SM8150, but with one additional clock frequency for the
gmu_clk_src clock.

Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210721225329.3035779-1-bjorn.andersson@linaro.org


Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 48662d98

Documentation/devicetree/bindings/clock/qcom,gpucc.yaml

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ properties: 
      - qcom,sdm845-gpucc

      - qcom,sc7180-gpucc

      - qcom,sc7280-gpucc

      - qcom,sc8180x-gpucc

      - qcom,sm8150-gpucc

      - qcom,sm8250-gpucc

drivers/clk/qcom/gpucc-sm8150.c

+12 −0
Original line number Diff line number Diff line
@@ -82,6 +82,14 @@ static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { 
	{ }

};



static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src_sc8180x[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0),

	F(400000000, P_GPLL0_OUT_MAIN, 1.5, 0, 0),

	F(500000000, P_GPU_CC_PLL1_OUT_MAIN, 1, 0, 0),

	{ }

};



static struct clk_rcg2 gpu_cc_gmu_clk_src = {

	.cmd_rcgr = 0x1120,

	.mnd_width = 0,
@@ -277,6 +285,7 @@ static const struct qcom_cc_desc gpu_cc_sm8150_desc = { 
};



static const struct of_device_id gpu_cc_sm8150_match_table[] = {

	{ .compatible = "qcom,sc8180x-gpucc" },

	{ .compatible = "qcom,sm8150-gpucc" },

	{ }

};
@@ -290,6 +299,9 @@ static int gpu_cc_sm8150_probe(struct platform_device *pdev) 
	if (IS_ERR(regmap))

		return PTR_ERR(regmap);



	if (of_device_is_compatible(pdev->dev.of_node, "qcom,sc8180x-gpucc"))

		gpu_cc_gmu_clk_src.freq_tbl = ftbl_gpu_cc_gmu_clk_src_sc8180x;



	clk_trion_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);



	return qcom_cc_really_probe(pdev, &gpu_cc_sm8150_desc, regmap);