Commit 94adb03f authored by Weili Qian's avatar Weili Qian Committed by Herbert Xu
Browse files

crypto: hisilicon/sec - enabling clock gating of the address prefetch module 



Change the value of clock gating register to 0x7fff to enable
clock gating of the address prefetch module. When the device is
idle, the clock is turned off to save power.

Signed-off-by: default avatarWeili Qian <qianweili@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent f57e2928

drivers/crypto/hisilicon/sec2/sec_main.c

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ 
#define SEC_CONTROL_REG		0x301200

#define SEC_DYNAMIC_GATE_REG		0x30121c

#define SEC_CORE_AUTO_GATE		0x30212c

#define SEC_DYNAMIC_GATE_EN		0x7bff

#define SEC_DYNAMIC_GATE_EN		0x7fff

#define SEC_CORE_AUTO_GATE_EN		GENMASK(3, 0)

#define SEC_CLK_GATE_ENABLE		BIT(3)

#define SEC_CLK_GATE_DISABLE		(~BIT(3))