Commit 9744e218 authored by Ayaz Abdulla's avatar Ayaz Abdulla Committed by Jeff Garzik
Browse files

[PATCH] forcedeth: deferral fixup 



This patch adds the definition for the deferral registers and fixes up
the use of these registers.

Signed-Off-By: default avatarAyaz Abdulla <aabdulla@nvidia.com>

Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 7c3dec06

drivers/net/forcedeth.c

+19 −7
Original line number Diff line number Diff line
@@ -240,10 +240,12 @@ enum { 
#define NVREG_RNDSEED_FORCE2	0x2d00

#define NVREG_RNDSEED_FORCE3	0x7400



	NvRegUnknownSetupReg1 = 0xA0,

#define NVREG_UNKSETUP1_VAL	0x16070f

	NvRegUnknownSetupReg2 = 0xA4,

#define NVREG_UNKSETUP2_VAL	0x16

	NvRegTxDeferral = 0xA0,

#define NVREG_TX_DEFERRAL_DEFAULT	0x15050f

#define NVREG_TX_DEFERRAL_RGMII_10_100	0x16070f

#define NVREG_TX_DEFERRAL_RGMII_1000	0x14050f

	NvRegRxDeferral = 0xA4,

#define NVREG_RX_DEFERRAL_DEFAULT	0x16

	NvRegMacAddrA = 0xA8,

	NvRegMacAddrB = 0xAC,

	NvRegMulticastAddrA = 0xB0,
@@ -2127,7 +2129,7 @@ static int nv_update_linkspeed(struct net_device *dev) 
	int newdup = np->duplex;

	int mii_status;

	int retval = 0;

	u32 control_1000, status_1000, phyreg, pause_flags;

	u32 control_1000, status_1000, phyreg, pause_flags, txreg;



	/* BMSR_LSTATUS is latched, read it twice:

	 * we want the current value.
@@ -2245,6 +2247,16 @@ static int nv_update_linkspeed(struct net_device *dev) 
		phyreg |= PHY_1000;

	writel(phyreg, base + NvRegPhyInterface);



	if (phyreg & PHY_RGMII) {

		if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)

			txreg = NVREG_TX_DEFERRAL_RGMII_1000;

		else

			txreg = NVREG_TX_DEFERRAL_RGMII_10_100;

	} else {

		txreg = NVREG_TX_DEFERRAL_DEFAULT;

	}

	writel(txreg, base + NvRegTxDeferral);



	writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),

		base + NvRegMisc1);

	pci_push(base);
@@ -3932,8 +3944,8 @@ static int nv_open(struct net_device *dev) 
	writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);

	get_random_bytes(&i, sizeof(i));

	writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed);

	writel(NVREG_UNKSETUP1_VAL, base + NvRegUnknownSetupReg1);

	writel(NVREG_UNKSETUP2_VAL, base + NvRegUnknownSetupReg2);

	writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);

	writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);

	if (poll_interval == -1) {

		if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)

			writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);