Commit 981034a2 authored by Shaohui Xie's avatar Shaohui Xie Committed by Shawn Guo
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dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG 



SCFG and DCFG are SoC-specific devices can be found on SoCs like LS1021A,
LS1043A and LS1046A, this patch updates bindings for SCFG and DCFG to
reflect more SoCs.

Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@nxp.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 75b637f3

Documentation/devicetree/bindings/arm/fsl.txt

+11 −3
Original line number Original line Diff line number Diff line
@@ -97,7 +97,7 @@ Freescale LS1021A Platform Device Tree Bindings 
Required root node compatible properties:

Required root node compatible properties:

  - compatible = "fsl,ls1021a";

  - compatible = "fsl,ls1021a";





Freescale LS1021A SoC-specific Device Tree Bindings

Freescale SoC-specific Device Tree Bindings

-------------------------------------------

-------------------------------------------





Freescale SCFG

Freescale SCFG
@@ -105,7 +105,11 @@ Freescale SCFG 
configuration and status registers for the chip. Such as getting PEX port

configuration and status registers for the chip. Such as getting PEX port

status.

status.

  Required properties:

  Required properties:

  - compatible: should be "fsl,ls1021a-scfg"

  - compatible: Should contain a chip-specific compatible string,

	Chip-specific strings are of the form "fsl,<chip>-scfg",

	The following <chip>s are known to be supported:

	ls1021a, ls1043a, ls1046a, ls2080a.



  - reg: should contain base address and length of SCFG memory-mapped registers

  - reg: should contain base address and length of SCFG memory-mapped registers





Example:

Example:
@@ -119,7 +123,11 @@ Freescale DCFG 
configuration and status for the device. Such as setting the secondary

configuration and status for the device. Such as setting the secondary

core start address and release the secondary core from holdoff and startup.

core start address and release the secondary core from holdoff and startup.

  Required properties:

  Required properties:

  - compatible: should be "fsl,ls1021a-dcfg"

  - compatible: Should contain a chip-specific compatible string,

	Chip-specific strings are of the form "fsl,<chip>-dcfg",

	The following <chip>s are known to be supported:

	ls1021a, ls1043a, ls1046a, ls2080a.



  - reg : should contain base address and length of DCFG memory-mapped registers

  - reg : should contain base address and length of DCFG memory-mapped registers





Example:

Example: