Commit 99c2e379 authored by Michael Trimarchi's avatar Michael Trimarchi Committed by Shawn Guo
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ARM: dts: imx6qdl-icore: Add fec phy-handle



LAN8720 needs a reset of every clock enable. The reset needs
to be done at device level, due the flag PHY_RST_AFTER_CLK_EN.

So, add phy-handle by creating mdio child node inside fec.
This will eventually move the phy-reset-gpio which is defined
in fec node.

Signed-off-by: default avatarMichael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b3d18de3
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+14 −1
Original line number Diff line number Diff line
@@ -150,10 +150,23 @@ &clks {
&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
	clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>;
	phy-mode = "rmii";
	phy-handle = <&eth_phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		eth_phy: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
			reset-assert-us = <4000>;
			reset-deassert-us = <4000>;
		};
	};
};

&gpmi {