Commit 9e2715ca authored by Vitaly Kuznetsov's avatar Vitaly Kuznetsov Committed by Paolo Bonzini
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KVM: x86: hyper-v: Honor HV_MSR_SYNIC_AVAILABLE privilege bit 



SynIC MSRs (HV_X64_MSR_SCONTROL, HV_X64_MSR_SVERSION, HV_X64_MSR_SIEFP,
HV_X64_MSR_SIMP, HV_X64_MSR_EOM, HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15)
are only available to guest when HV_MSR_SYNIC_AVAILABLE bit is exposed.

Signed-off-by: default avatarVitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210521095204.2161214-12-vkuznets@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent a1ec661c

arch/x86/kvm/hyperv.c

+8 −0
Original line number Diff line number Diff line
@@ -1228,6 +1228,14 @@ static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr) 
	case HV_X64_MSR_REFERENCE_TSC:

		return hv_vcpu->cpuid_cache.features_eax &

			HV_MSR_REFERENCE_TSC_AVAILABLE;

	case HV_X64_MSR_SCONTROL:

	case HV_X64_MSR_SVERSION:

	case HV_X64_MSR_SIEFP:

	case HV_X64_MSR_SIMP:

	case HV_X64_MSR_EOM:

	case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:

		return hv_vcpu->cpuid_cache.features_eax &

			HV_MSR_SYNIC_AVAILABLE;

	default:

		break;

	}