Commit 9e9caa4b authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/backlight: use VLV_DISPLAY_BASE for VLV/CHV backlight registers 



Since the VLV/CHV backlight registers are only used on VLV/CHV, there's
no need to dynamically look up DISPLAY_MMIO_BASE(). We know it's
VLV_DISPLAY_BASE. Use it statically, reducing the implicit dev_priv
references.

Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/eb252083a56ec64b4fdb58d4d30abcf305a3a9c2.1670405587.git.jani.nikula@intel.com
parent 955f4d71

drivers/gpu/drm/i915/display/intel_backlight_regs.h

+9 −12
Original line number Diff line number Diff line
@@ -8,20 +8,17 @@ 


#include "intel_display_reg_defs.h"



#define _VLV_BLC_PWM_CTL2_A (DISPLAY_MMIO_BASE(dev_priv) + 0x61250)

#define _VLV_BLC_PWM_CTL2_B (DISPLAY_MMIO_BASE(dev_priv) + 0x61350)

#define VLV_BLC_PWM_CTL2(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL2_A, \

					 _VLV_BLC_PWM_CTL2_B)

#define _VLV_BLC_PWM_CTL2_A		(VLV_DISPLAY_BASE + 0x61250)

#define _VLV_BLC_PWM_CTL2_B		(VLV_DISPLAY_BASE + 0x61350)

#define VLV_BLC_PWM_CTL2(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL2_A, _VLV_BLC_PWM_CTL2_B)



#define _VLV_BLC_PWM_CTL_A (DISPLAY_MMIO_BASE(dev_priv) + 0x61254)

#define _VLV_BLC_PWM_CTL_B (DISPLAY_MMIO_BASE(dev_priv) + 0x61354)

#define VLV_BLC_PWM_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL_A, \

					_VLV_BLC_PWM_CTL_B)

#define _VLV_BLC_PWM_CTL_A		(VLV_DISPLAY_BASE + 0x61254)

#define _VLV_BLC_PWM_CTL_B		(VLV_DISPLAY_BASE + 0x61354)

#define VLV_BLC_PWM_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL_A, _VLV_BLC_PWM_CTL_B)



#define _VLV_BLC_HIST_CTL_A (DISPLAY_MMIO_BASE(dev_priv) + 0x61260)

#define _VLV_BLC_HIST_CTL_B (DISPLAY_MMIO_BASE(dev_priv) + 0x61360)

#define VLV_BLC_HIST_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_HIST_CTL_A, \

					 _VLV_BLC_HIST_CTL_B)

#define _VLV_BLC_HIST_CTL_A		(VLV_DISPLAY_BASE + 0x61260)

#define _VLV_BLC_HIST_CTL_B		(VLV_DISPLAY_BASE + 0x61360)

#define VLV_BLC_HIST_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_HIST_CTL_A, _VLV_BLC_HIST_CTL_B)



/* Backlight control */

#define BLC_PWM_CTL2	_MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61250) /* 965+ only */