Commit a0e8618c authored Feb 05, 2009 by Anton Vorontsov Committed by Kumar Gala Feb 06, 2009

powerpc/83xx: Add FSL eSDHC support for MPC837x-RDB boards



Simply add appropriate sdhci nodes.

Note that U-Boot should configure pin multiplexing for eSDHC prior
to Linux could use it. U-Boot should also fill-in the clock-frequency
property (eSDHC clock depends on board-specific SCCR[ESDHCCM] bits).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

parent 766d2826

arch/powerpc/boot/dts/mpc8377_rdb.dts

+9 −0

Original line number	Diff line number	Diff line
		@@ -320,6 +320,15 @@ crypto@30000 {
		fsl,descriptor-types-mask = <0x3ab0ebf>;
		};

		sdhci@2e000 {
		compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
		reg = <0x2e000 0x1000>;
		interrupts = <42 0x8>;
		interrupt-parent = <&ipic>;
		/* Filled in by U-Boot */
		clock-frequency = <0>;
		};

		sata@18000 {
		compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
		reg = <0x18000 0x1000>;

arch/powerpc/boot/dts/mpc8378_rdb.dts

+9 −0

Original line number	Diff line number	Diff line
		@@ -318,6 +318,15 @@ crypto@30000 {
		fsl,descriptor-types-mask = <0x3ab0ebf>;
		};

		sdhci@2e000 {
		compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
		reg = <0x2e000 0x1000>;
		interrupts = <42 0x8>;
		interrupt-parent = <&ipic>;
		/* Filled in by U-Boot */
		clock-frequency = <0>;
		};

		/* IPIC
		* interrupts cell = <intr #, sense>
		* sense values match linux IORESOURCE_IRQ_* defines:

arch/powerpc/boot/dts/mpc8379_rdb.dts

+9 −0

Original line number	Diff line number	Diff line
		@@ -317,6 +317,15 @@ crypto@30000 {
		fsl,descriptor-types-mask = <0x3ab0ebf>;
		};

		sdhci@2e000 {
		compatible = "fsl,mpc8379-esdhc";
		reg = <0x2e000 0x1000>;
		interrupts = <42 0x8>;
		interrupt-parent = <&ipic>;
		/* Filled in by U-Boot */
		clock-frequency = <0>;
		};

		sata@18000 {
		compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
		reg = <0x18000 0x1000>;