Loading Documentation/devicetree/bindings/timer/renesas,ostm.txt 0 → 100644 +30 −0 Original line number Diff line number Diff line * Renesas OS Timer (OSTM) The OSTM is a multi-channel 32-bit timer/counter with fixed clock source that can operate in either interval count down timer or free-running compare match mode. Channels are independent from each other. Required Properties: - compatible: must be one or more of the following: - "renesas,r7s72100-ostm" for the r7s72100 OSTM - "renesas,ostm" for any OSTM This is a fallback for the above renesas,*-ostm entries - reg: base address and length of the register block for a timer channel. - interrupts: interrupt specifier for the timer channel. - clocks: clock specifier for the timer channel. Example: R7S72100 (RZ/A1H) OSTM node ostm0: timer@fcfec000 { compatible = "renesas,r7s72100-ostm", "renesas,ostm"; reg = <0xfcfec000 0x30>; interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; power-domains = <&cpg_clocks>; }; Loading
Documentation/devicetree/bindings/timer/renesas,ostm.txt 0 → 100644 +30 −0 Original line number Diff line number Diff line * Renesas OS Timer (OSTM) The OSTM is a multi-channel 32-bit timer/counter with fixed clock source that can operate in either interval count down timer or free-running compare match mode. Channels are independent from each other. Required Properties: - compatible: must be one or more of the following: - "renesas,r7s72100-ostm" for the r7s72100 OSTM - "renesas,ostm" for any OSTM This is a fallback for the above renesas,*-ostm entries - reg: base address and length of the register block for a timer channel. - interrupts: interrupt specifier for the timer channel. - clocks: clock specifier for the timer channel. Example: R7S72100 (RZ/A1H) OSTM node ostm0: timer@fcfec000 { compatible = "renesas,r7s72100-ostm", "renesas,ostm"; reg = <0xfcfec000 0x30>; interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; power-domains = <&cpg_clocks>; };