Commit a2b642d8 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes 



Sort the pinctrl nodes alphabetically.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 1889f479

arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi

+12 −12
Original line number Original line Diff line number Diff line
@@ -12,11 +12,6 @@ &pinctrl { 
	pinctrl-0 = <&sound_clk_pins>;

	pinctrl-0 = <&sound_clk_pins>;

	pinctrl-names = "default";

	pinctrl-names = "default";





	scif0_pins: scif0 {

		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */

			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */

	};



#if SW_SCIF_CAN

#if SW_SCIF_CAN

	/* SW8 should be at position 2->1 */

	/* SW8 should be at position 2->1 */

	can1_pins: can1 {

	can1_pins: can1 {
@@ -25,13 +20,6 @@ can1_pins: can1 { 
	};

	};

#endif

#endif





	scif1_pins: scif1 {

		pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */

			 <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */

			 <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */

			 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */

	};



#if SW_RSPI_CAN

#if SW_RSPI_CAN

	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */

	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */

	can1-stb-hog {

	can1-stb-hog {
@@ -47,6 +35,18 @@ can1_pins: can1 { 
	};

	};

#endif

#endif





	scif0_pins: scif0 {

		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */

			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */

	};



	scif1_pins: scif1 {

		pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */

			 <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */

			 <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */

			 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */

	};



	sd1-pwr-en-hog {

	sd1-pwr-en-hog {

		gpio-hog;

		gpio-hog;

		gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;

		gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;