Commit a482b02d authored by Jia Jie Ho's avatar Jia Jie Ho Committed by Herbert Xu
Browse files

dt-bindings: rng: Add StarFive TRNG module 



Add documentation to describe Starfive true random number generator
module.

Co-developed-by: default avatarJenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: default avatarJenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: default avatarJia Jie Ho <jiajie.ho@starfivetech.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 4fc790d7

Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: StarFive SoC TRNG Module



maintainers:

  - Jia Jie Ho <jiajie.ho@starfivetech.com>



properties:

  compatible:

    const: starfive,jh7110-trng



  reg:

    maxItems: 1



  clocks:

    items:

      - description: Hardware reference clock

      - description: AHB reference clock



  clock-names:

    items:

      - const: hclk

      - const: ahb



  resets:

    maxItems: 1



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - resets

  - interrupts



additionalProperties: false



examples:

  - |

    rng: rng@1600C000 {

        compatible = "starfive,jh7110-trng";

        reg = <0x1600C000 0x4000>;

        clocks = <&clk 15>, <&clk 16>;

        clock-names = "hclk", "ahb";

        resets = <&reset 3>;

        interrupts = <30>;

    };

...