Commit a4c75ba8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'testing/bcmring' into next/cleanups 



This attempts to get the bcmring platform better in line with the
other platforms. Moving the header files below mach/ helps with
the future reorganization for multiplatform kernels, and using
MMIO accessors is generally the right thing.

* testing/bcmring:
  ARM: bcmring: use proper MMIO accessors
  ARM: bcmring: remove include/csp/ subdir
  ARM: bcmring: move cfg_global header to mach/

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 19ec6cac 878040ef

arch/arm/mach-bcmring/arch.c

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ 
#include <mach/csp/chipcHw_def.h>

#include <mach/csp/chipcHw_inline.h>



#include <cfg_global.h>

#include <mach/cfg_global.h>



#include "core.h"

arch/arm/mach-bcmring/core.c

+1 −2
Original line number Diff line number Diff line
@@ -43,11 +43,10 @@ 
#include <asm/mach/time.h>

#include <asm/mach/map.h>



#include <cfg_global.h>

#include <mach/cfg_global.h>



#include "clock.h"



#include <csp/secHw.h>

#include <mach/csp/secHw_def.h>

#include <mach/csp/chipcHw_inline.h>

#include <mach/csp/tmrHw_reg.h>

arch/arm/mach-bcmring/csp/chipc/chipcHw.c

+70 −67

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arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c

+40 −50

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arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c

+10 −9
Original line number Diff line number Diff line
@@ -13,11 +13,11 @@ 
*****************************************************************************/



/* ---- Include Files ---------------------------------------------------- */

#include <csp/stdint.h>

#include <linux/types.h>

#include <mach/csp/chipcHw_def.h>

#include <mach/csp/chipcHw_inline.h>

#include <csp/intcHw.h>

#include <csp/cache.h>

#include <mach/csp/intcHw_reg.h>

#include <asm/cacheflush.h>



/* ---- Private Constants and Types --------------------------------------- */

/* ---- Private Variables ------------------------------------------------- */
@@ -50,17 +50,18 @@ void chipcHw_reset(uint32_t mask) 
			chipcHw_softReset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);

		}

		/* Bypass the PLL clocks before reboot */

		pChipcHw->UARTClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;

		pChipcHw->SPIClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;

		writel(readl(&pChipcHw->UARTClock) | chipcHw_REG_PLL_CLOCK_BYPASS_SELECT,

			&pChipcHw->UARTClock);

		writel(readl(&pChipcHw->SPIClock) | chipcHw_REG_PLL_CLOCK_BYPASS_SELECT,

			&pChipcHw->SPIClock);



		/* Copy the chipcHw_warmReset_run_from_aram function into ARAM */

		do {

			((uint32_t *) MM_IO_BASE_ARAM)[i] =

			    ((uint32_t *) &chipcHw_reset_run_from_aram)[i];

			writel(((uint32_t *) &chipcHw_reset_run_from_aram)[i], ((uint32_t __iomem *) MM_IO_BASE_ARAM) + i);

			i++;

		} while (((uint32_t *) MM_IO_BASE_ARAM)[i - 1] != 0xe1a0f00f);	/* 0xe1a0f00f == asm ("mov r15, r15"); */

		} while (readl(((uint32_t __iomem*) MM_IO_BASE_ARAM) + i - 1) != 0xe1a0f00f);	/* 0xe1a0f00f == asm ("mov r15, r15"); */



		CSP_CACHE_FLUSH_ALL;

		flush_cache_all();



		/* run the function from ARAM */

		runFunc();