Commit a7bebdc5 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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pinctrl: renesas: r8a77970: Add support for AVB power-source



Add support for configuring the I/O voltage level of the Ethernet AVB
pins on the R-Car V3M SoC.  "PIN_VDDQ_AVB0" can be configured for 2.5V
or 3.3V operation.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/eb4db82bdeb67507a1a77f63b9d90280d6f38ba4.1678271030.git.geert+renesas@glider.be
parent b88e733a
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+20 −8
Original line number Diff line number Diff line
@@ -34,7 +34,8 @@
	PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP)
	PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP),	\
	PIN_NOGP_CFG(VDDQ_AVB0, "VDDQ_AVB0", fn, SH_PFC_PIN_CFG_IO_VOLTAGE_25_33)

/*
 * F_() : just information
@@ -2364,20 +2365,31 @@ static int r8a77970_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
	int bit = pin & 0x1f;

	switch (pin) {
	case RCAR_GP_PIN(0, 0) ... RCAR_GP_PIN(0, 21):
		*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
	if (pin >= RCAR_GP_PIN(0, 0) && pin <= RCAR_GP_PIN(0, 21))
		return bit;
	if (pin >= RCAR_GP_PIN(2, 0) && pin <= RCAR_GP_PIN(2, 9))

	case RCAR_GP_PIN(2, 0) ... RCAR_GP_PIN(2, 9):
		*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
		return bit + 22;

	case RCAR_GP_PIN(2, 10) ... RCAR_GP_PIN(2, 16):
		*pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg;
	if (pin >= RCAR_GP_PIN(2, 10) && pin <= RCAR_GP_PIN(2, 16))
		return bit - 10;
	if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 16))

	case RCAR_GP_PIN(3, 0) ... RCAR_GP_PIN(3, 16):
		*pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg;
		return bit + 7;

	case PIN_VDDQ_AVB0:
		*pocctrl = pinmux_ioctrl_regs[POCCTRL2].reg;
		return 0;

	default:
		return -EINVAL;
	}
}

static const struct pinmux_bias_reg pinmux_bias_regs[] = {
	{ PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) {