Commit ab9c2112 authored by John Clements's avatar John Clements Committed by Alex Deucher
Browse files

drm/amdgpu: Add cmd to control XGMI link sleep



Added host to SMU FW cmd to enable/disable XGMI link power down

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 29c1ec24
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+22 −0
Original line number Diff line number Diff line
@@ -2100,6 +2100,28 @@ int smu_set_df_cstate(struct smu_context *smu,
	return ret;
}

int smu_allow_xgmi_power_down(struct smu_context *smu, bool en)
{
	struct amdgpu_device *adev = smu->adev;
	int ret = 0;

	if (!adev->pm.dpm_enabled)
		return -EINVAL;

	if (!smu->ppt_funcs || !smu->ppt_funcs->allow_xgmi_power_down)
		return 0;

	mutex_lock(&smu->mutex);

	ret = smu->ppt_funcs->allow_xgmi_power_down(smu, en);
	if (ret)
		pr_err("[AllowXgmiPowerDown] failed!\n");

	mutex_unlock(&smu->mutex);

	return ret;
}

int smu_write_watermarks_table(struct smu_context *smu)
{
	void *watermarks_table = smu->smu_table.watermarks_table;
+31 −0
Original line number Diff line number Diff line
@@ -128,6 +128,7 @@ static struct smu_11_0_cmn2aisc_mapping arcturus_message_map[SMU_MSG_MAX_COUNT]
	MSG_MAP(SetXgmiMode,			     PPSMC_MSG_SetXgmiMode),
	MSG_MAP(SetMemoryChannelEnable,		     PPSMC_MSG_SetMemoryChannelEnable),
	MSG_MAP(DFCstateControl,		     PPSMC_MSG_DFCstateControl),
	MSG_MAP(GmiPwrDnControl,		     PPSMC_MSG_GmiPwrDnControl),
};

static struct smu_11_0_cmn2aisc_mapping arcturus_clk_map[SMU_CLK_COUNT] = {
@@ -2286,6 +2287,35 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
	return smu_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state, NULL);
}

static int arcturus_allow_xgmi_power_down(struct smu_context *smu, bool en)
{
	uint32_t smu_version;
	int ret;

	ret = smu_get_smc_version(smu, NULL, &smu_version);
	if (ret) {
		pr_err("Failed to get smu version!\n");
		return ret;
	}

	/* PPSMC_MSG_GmiPwrDnControl is supported by 54.20.0 and onwards */
	if (smu_version < 0x365000) {
		pr_err("XGMI power down control is only supported by PMFW 54.20.0 and onwards\n");
		return -EINVAL;
	}

	if (en)
		return smu_send_smc_msg_with_param(smu,
						   SMU_MSG_GmiPwrDnControl,
						   1,
						   NULL);

	return smu_send_smc_msg_with_param(smu,
					   SMU_MSG_GmiPwrDnControl,
					   0,
					   NULL);
}

static const struct pptable_funcs arcturus_ppt_funcs = {
	/* translate smu index into arcturus specific index */
	.get_smu_msg_index = arcturus_get_smu_msg_index,
@@ -2379,6 +2409,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
	.override_pcie_parameters = smu_v11_0_override_pcie_parameters,
	.get_pptable_power_limit = arcturus_get_pptable_power_limit,
	.set_df_cstate = arcturus_set_df_cstate,
	.allow_xgmi_power_down = arcturus_allow_xgmi_power_down,
};

void arcturus_set_ppt_funcs(struct smu_context *smu)
+2 −0
Original line number Diff line number Diff line
@@ -491,6 +491,7 @@ struct pptable_funcs {
	int (*get_dpm_clk_limited)(struct smu_context *smu, enum smu_clk_type clk_type,
				   uint32_t dpm_level, uint32_t *freq);
	int (*set_df_cstate)(struct smu_context *smu, enum pp_df_cstate state);
	int (*allow_xgmi_power_down)(struct smu_context *smu, bool en);
	int (*update_pcie_parameters)(struct smu_context *smu, uint32_t pcie_gen_cap, uint32_t pcie_width_cap);
	int (*i2c_eeprom_init)(struct i2c_adapter *control);
	void (*i2c_eeprom_fini)(struct i2c_adapter *control);
@@ -731,6 +732,7 @@ int smu_set_mp1_state(struct smu_context *smu,
		      enum pp_mp1_state mp1_state);
int smu_set_df_cstate(struct smu_context *smu,
		      enum pp_df_cstate state);
int smu_allow_xgmi_power_down(struct smu_context *smu, bool en);

int smu_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
					 struct pp_smu_nv_clock_table *max_clocks);
+2 −1
Original line number Diff line number Diff line
@@ -114,7 +114,8 @@
#define PPSMC_MSG_SetNumBadHbmPagesRetired	 0x3A

#define PPSMC_MSG_DFCstateControl		 0x3B
#define PPSMC_Message_Count			 0x3C
#define PPSMC_MSG_GmiPwrDnControl                0x3D
#define PPSMC_Message_Count                      0x3E

typedef uint32_t PPSMC_Result;
typedef uint32_t PPSMC_Msg;
+1 −0
Original line number Diff line number Diff line
@@ -170,6 +170,7 @@
	__SMU_DUMMY_MAP(SetSoftMinJpeg),              \
	__SMU_DUMMY_MAP(SetHardMinFclkByFreq),        \
	__SMU_DUMMY_MAP(DFCstateControl), \
	__SMU_DUMMY_MAP(GmiPwrDnControl), \
	__SMU_DUMMY_MAP(DAL_DISABLE_DUMMY_PSTATE_CHANGE), \
	__SMU_DUMMY_MAP(DAL_ENABLE_DUMMY_PSTATE_CHANGE), \