Commit ac59ed9c authored by Neil Armstrong's avatar Neil Armstrong Committed by Philipp Zabel
Browse files

reset: oxnas: remove obsolete reset driver 



Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 peripheral reset.

Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Acked-by: default avatarDaniel Golle <daniel@makrotopia.org>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230331-topic-oxnas-upstream-remove-v1-17-5bd58fd1dd1f@linaro.org


Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
parent 20a6a4d7

Documentation/devicetree/bindings/reset/oxnas,reset.txt

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Oxford Semiconductor OXNAS SoC Family RESET Controller

================================================



Please also refer to reset.txt in this directory for common reset

controller binding usage.



Required properties:

- compatible: For OX810SE, should be "oxsemi,ox810se-reset"

	      For OX820, should be "oxsemi,ox820-reset"

- #reset-cells: 1, see below



Parent node should have the following properties :

- compatible: For OX810SE, should be :

			"oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"

	      For OX820, should be :

			"oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd"



Reset indices are in dt-bindings include files :

- For OX810SE: include/dt-bindings/reset/oxsemi,ox810se.h

- For OX820: include/dt-bindings/reset/oxsemi,ox820.h



example:



sys: sys-ctrl@000000 {

	compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";

	reg = <0x000000 0x100000>;



	reset: reset-controller {

		compatible = "oxsemi,ox810se-reset";

		#reset-cells = <1>;

	};

};

drivers/reset/Kconfig

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@@ -143,9 +143,6 @@ config RESET_NPCM 
	  This enables the reset controller driver for Nuvoton NPCM

	  BMC SoCs.



config RESET_OXNAS

	bool



config RESET_PISTACHIO

	bool "Pistachio Reset Driver"

	depends on MIPS || COMPILE_TEST

drivers/reset/Makefile

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@@ -21,7 +21,6 @@ obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o 
obj-$(CONFIG_RESET_MESON) += reset-meson.o

obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o

obj-$(CONFIG_RESET_NPCM) += reset-npcm.o

obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o

obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o

obj-$(CONFIG_RESET_POLARFIRE_SOC) += reset-mpfs.o

obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o

drivers/reset/reset-oxnas.c

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// SPDX-License-Identifier: GPL-2.0-only

/*

 * Oxford Semiconductor Reset Controller driver

 *

 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>

 * Copyright (C) 2014 Ma Haijun <mahaijuns@gmail.com>

 * Copyright (C) 2009 Oxford Semiconductor Ltd

 */

#include <linux/err.h>

#include <linux/init.h>

#include <linux/of.h>

#include <linux/platform_device.h>

#include <linux/reset-controller.h>

#include <linux/slab.h>

#include <linux/delay.h>

#include <linux/types.h>

#include <linux/regmap.h>

#include <linux/mfd/syscon.h>



/* Regmap offsets */

#define RST_SET_REGOFFSET	0x34

#define RST_CLR_REGOFFSET	0x38



struct oxnas_reset {

	struct regmap *regmap;

	struct reset_controller_dev rcdev;

};



static int oxnas_reset_reset(struct reset_controller_dev *rcdev,

			      unsigned long id)

{

	struct oxnas_reset *data =

		container_of(rcdev, struct oxnas_reset, rcdev);



	regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id));

	msleep(50);

	regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id));



	return 0;

}



static int oxnas_reset_assert(struct reset_controller_dev *rcdev,

			      unsigned long id)

{

	struct oxnas_reset *data =

		container_of(rcdev, struct oxnas_reset, rcdev);



	regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id));



	return 0;

}



static int oxnas_reset_deassert(struct reset_controller_dev *rcdev,

				unsigned long id)

{

	struct oxnas_reset *data =

		container_of(rcdev, struct oxnas_reset, rcdev);



	regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id));



	return 0;

}



static const struct reset_control_ops oxnas_reset_ops = {

	.reset		= oxnas_reset_reset,

	.assert		= oxnas_reset_assert,

	.deassert	= oxnas_reset_deassert,

};



static const struct of_device_id oxnas_reset_dt_ids[] = {

	 { .compatible = "oxsemi,ox810se-reset", },

	 { .compatible = "oxsemi,ox820-reset", },

	 { /* sentinel */ },

};



static int oxnas_reset_probe(struct platform_device *pdev)

{

	struct oxnas_reset *data;

	struct device *parent;



	parent = pdev->dev.parent;

	if (!parent) {

		dev_err(&pdev->dev, "no parent\n");

		return -ENODEV;

	}



	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);

	if (!data)

		return -ENOMEM;



	data->regmap = syscon_node_to_regmap(parent->of_node);

	if (IS_ERR(data->regmap)) {

		dev_err(&pdev->dev, "failed to get parent regmap\n");

		return PTR_ERR(data->regmap);

	}



	platform_set_drvdata(pdev, data);



	data->rcdev.owner = THIS_MODULE;

	data->rcdev.nr_resets = 32;

	data->rcdev.ops = &oxnas_reset_ops;

	data->rcdev.of_node = pdev->dev.of_node;



	return devm_reset_controller_register(&pdev->dev, &data->rcdev);

}



static struct platform_driver oxnas_reset_driver = {

	.probe	= oxnas_reset_probe,

	.driver = {

		.name		= "oxnas-reset",

		.of_match_table	= oxnas_reset_dt_ids,

	},

};

builtin_platform_driver(oxnas_reset_driver);