Commit ade3f08f authored by Eduard Zingerman's avatar Eduard Zingerman Committed by Alexei Starovoitov
Browse files

selftests/bpf: verifier/masking.c converted to inline assembly



Test verifier/masking.c automatically converted to use inline assembly.

Signed-off-by: default avatarEduard Zingerman <eddyz87@gmail.com>
Link: https://lore.kernel.org/r/20230325025524.144043-30-eddyz87@gmail.com


Signed-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
parent 05e474ec
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+2 −0
Original line number Original line Diff line number Diff line
@@ -26,6 +26,7 @@
#include "verifier_leak_ptr.skel.h"
#include "verifier_leak_ptr.skel.h"
#include "verifier_map_ptr.skel.h"
#include "verifier_map_ptr.skel.h"
#include "verifier_map_ret_val.skel.h"
#include "verifier_map_ret_val.skel.h"
#include "verifier_masking.skel.h"


__maybe_unused
__maybe_unused
static void run_tests_aux(const char *skel_name, skel_elf_bytes_fn elf_bytes_factory)
static void run_tests_aux(const char *skel_name, skel_elf_bytes_fn elf_bytes_factory)
@@ -74,3 +75,4 @@ void test_verifier_ld_ind(void) { RUN(verifier_ld_ind); }
void test_verifier_leak_ptr(void)             { RUN(verifier_leak_ptr); }
void test_verifier_leak_ptr(void)             { RUN(verifier_leak_ptr); }
void test_verifier_map_ptr(void)              { RUN(verifier_map_ptr); }
void test_verifier_map_ptr(void)              { RUN(verifier_map_ptr); }
void test_verifier_map_ret_val(void)          { RUN(verifier_map_ret_val); }
void test_verifier_map_ret_val(void)          { RUN(verifier_map_ret_val); }
void test_verifier_masking(void)              { RUN(verifier_masking); }
+410 −0
Original line number Original line Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
/* Converted from tools/testing/selftests/bpf/verifier/masking.c */

#include <linux/bpf.h>
#include <bpf/bpf_helpers.h>
#include "bpf_misc.h"

SEC("socket")
__description("masking, test out of bounds 1")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_1(void)
{
	asm volatile ("					\
	w1 = 5;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 5 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 2")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_2(void)
{
	asm volatile ("					\
	w1 = 1;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 3")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_3(void)
{
	asm volatile ("					\
	w1 = 0xffffffff;				\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xffffffff - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 4")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_4(void)
{
	asm volatile ("					\
	w1 = 0xffffffff;				\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 5")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_5(void)
{
	asm volatile ("					\
	w1 = -1;					\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 6")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_6(void)
{
	asm volatile ("					\
	w1 = -1;					\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xffffffff - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 7")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_7(void)
{
	asm volatile ("					\
	r1 = 5;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 5 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 8")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_8(void)
{
	asm volatile ("					\
	r1 = 1;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 9")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_9(void)
{
	asm volatile ("					\
	r1 = 0xffffffff;				\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xffffffff - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 10")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_10(void)
{
	asm volatile ("					\
	r1 = 0xffffffff;				\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 11")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_11(void)
{
	asm volatile ("					\
	r1 = -1;					\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test out of bounds 12")
__success __success_unpriv __retval(0)
__naked void test_out_of_bounds_12(void)
{
	asm volatile ("					\
	r1 = -1;					\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xffffffff - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 1")
__success __success_unpriv __retval(4)
__naked void masking_test_in_bounds_1(void)
{
	asm volatile ("					\
	w1 = 4;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 5 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 2")
__success __success_unpriv __retval(0)
__naked void masking_test_in_bounds_2(void)
{
	asm volatile ("					\
	w1 = 0;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xffffffff - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 3")
__success __success_unpriv __retval(0xfffffffe)
__naked void masking_test_in_bounds_3(void)
{
	asm volatile ("					\
	w1 = 0xfffffffe;				\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xffffffff - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 4")
__success __success_unpriv __retval(0xabcde)
__naked void masking_test_in_bounds_4(void)
{
	asm volatile ("					\
	w1 = 0xabcde;					\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 0xabcdef - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 5")
__success __success_unpriv __retval(0)
__naked void masking_test_in_bounds_5(void)
{
	asm volatile ("					\
	w1 = 0;						\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 1 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 6")
__success __success_unpriv __retval(46)
__naked void masking_test_in_bounds_6(void)
{
	asm volatile ("					\
	w1 = 46;					\
	w2 = %[__imm_0];				\
	r2 -= r1;					\
	r2 |= r1;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r1 &= r2;					\
	r0 = r1;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 47 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 7")
__success __success_unpriv __retval(46)
__naked void masking_test_in_bounds_7(void)
{
	asm volatile ("					\
	r3 = -46;					\
	r3 *= -1;					\
	w2 = %[__imm_0];				\
	r2 -= r3;					\
	r2 |= r3;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r3 &= r2;					\
	r0 = r3;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 47 - 1)
	: __clobber_all);
}

SEC("socket")
__description("masking, test in bounds 8")
__success __success_unpriv __retval(0)
__naked void masking_test_in_bounds_8(void)
{
	asm volatile ("					\
	r3 = -47;					\
	r3 *= -1;					\
	w2 = %[__imm_0];				\
	r2 -= r3;					\
	r2 |= r3;					\
	r2 = -r2;					\
	r2 s>>= 63;					\
	r3 &= r2;					\
	r0 = r3;					\
	exit;						\
"	:
	: __imm_const(__imm_0, 47 - 1)
	: __clobber_all);
}

char _license[] SEC("license") = "GPL";
+0 −322
Original line number Original line Diff line number Diff line
{
	"masking, test out of bounds 1",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 5),
	BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 2",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 1),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 3",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
	BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 4",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 5",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, -1),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 6",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, -1),
	BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 7",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, 5),
	BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 8",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, 1),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 9",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
	BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 10",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 11",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, -1),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test out of bounds 12",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, -1),
	BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test in bounds 1",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 4),
	BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 4,
},
{
	"masking, test in bounds 2",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 0),
	BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test in bounds 3",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 0xfffffffe),
	BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0xfffffffe,
},
{
	"masking, test in bounds 4",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 0xabcde),
	BPF_MOV32_IMM(BPF_REG_2, 0xabcdef - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0xabcde,
},
{
	"masking, test in bounds 5",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 0),
	BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"masking, test in bounds 6",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_1, 46),
	BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 46,
},
{
	"masking, test in bounds 7",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_3, -46),
	BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
	BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 46,
},
{
	"masking, test in bounds 8",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_3, -47),
	BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
	BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
	BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
	BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
	BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},